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74LVC27价格
参考价格：￥1.1206
型号：74LVC273AQ20-13 品牌：Diodes 备注：这里有74LVC27多少钱，2025年最近7天走势，今日出价，今日竞价，74LVC27批发/采购报价，74LVC27行情走势销售排行榜，74LVC27报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LVC27 | Triple 3-input NOR gate DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. FEATURES • Wide supply voltage: 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • In | Philips 飞利浦 |   | |
Octal D-type flip-flop with reset; positive-edge trigger DESCRIPTION The 74LVC273 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) a | Philips 飞利浦 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 1. General description The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (C | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 1. General description The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (C | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 1. General description The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (C | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger DESCRIPTION The 74LVC273 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) a | Philips 飞利浦 | | ||
Octal D-type flip-flop with reset; positive-edge trigger DESCRIPTION The 74LVC273 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) a | Philips 飞利浦 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 1. General description The 74LVC273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (C | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger DESCRIPTION The 74LVC273 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) a | Philips 飞利浦 | | ||
Octal D-type flip-flop with reset; positive-edge trigger DESCRIPTION The 74LVC273 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) a | Philips 飞利浦 | | ||
Triple 3-input NOR gate DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. FEATURES • Wide supply voltage: 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • In | Philips 飞利浦 | | ||
Triple 3-input NOR gate DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. FEATURES • Wide supply voltage: 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • In | Philips 飞利浦 | | ||
Triple 3-input NOR gate DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. FEATURES • Wide supply voltage: 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • In | Philips 飞利浦 | | ||
Triple 3-input NOR gate DESCRIPTION The 74LVC27 is a high-performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC27 provides the 3-input NOR function. FEATURES • Wide supply voltage: 1.2 to 3.6 V • In accordance with JEDEC standard no. 8-1A. • In | Philips 飞利浦 | | ||
OCTAL D-TYPE FLIP-FLOP WITH CLEAR 文件：465.91 Kbytes Page：10 Pages | DIODES 美台半导体 | | ||
OCTAL D-TYPE FLIP-FLOP WITH CLEAR 文件：465.91 Kbytes Page：10 Pages | DIODES 美台半导体 | | ||
OCTAL D-TYPE FLIP-FLOP WITH CLEAR 文件：465.91 Kbytes Page：10 Pages | DIODES 美台半导体 | | ||
封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 功能：复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路（IC） 触发器 | DIODES 美台半导体 | | ||
Octal D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
封装/外壳：20-VFQFN 裸露焊盘 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 8BIT 20DHVQFN 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Octal D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 文件：715.31 Kbytes Page：16 Pages | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 文件：715.31 Kbytes Page：16 Pages | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 文件：715.31 Kbytes Page：16 Pages | NEXPERIA 安世 | | ||
Octal D-type flip-flop with reset; positive-edge trigger 文件：715.31 Kbytes Page：16 Pages | NEXPERIA 安世 | |
74LVC27产品属性
- 类型
描述
- 型号
74LVC27
- 制造商
Integrated Device Technology Inc
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
恩XP |
24+ |
标准封装 |
7948 |
全新原装正品/价格优惠/质量保障 |
|||
恩XP |
2016+ |
TSSOP |
2500 |
只做原装,假一罚十,公司可开17%增值税发票! |
|||
恩XP |
25+ |
QFN |
54815 |
百分百原装现货,实单必成,欢迎询价 |
|||
恩XP |
10+ |
TSSOP20 |
10000 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
24+ |
QFN |
20000 |
全新原厂原装，进口正品现货，正规渠道可含税！！ |
||||
恩XP |
21+ |
SOIC-20_300mil |
8080 |
只做原装,质量保证 |
|||
恩XP |
23+ |
N/A |
12000 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
Nexperia |
1712+ |
TSSOP20 |
2500 |
1712+ |
|||
NA |
23+ |
NA |
26094 |
10年以上分销经验原装进口正品,做服务型企业 |
|||
恩XP |
25+ |
SSOP-20 |
32360 |
NXP/恩智浦全新特价74LVC273DB即刻询购立享优惠#长期有货 |
74LVC27规格书下载地址
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DdatasheetPDF页码索引
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