74LVC163价格

参考价格:¥1.5480

型号:74LVC16373ADGG,112 品牌:NXP 备注:这里有74LVC163多少钱,2025年最近7天走势,今日出价,今日竞价,74LVC163批发/采购报价,74LVC163行情走势销售排行榜,74LVC163报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74LVC163

Presettable synchronous 4-bit binary counter; synchronous reset

DESCRIPTION The 74LVC163 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Philips

飞利浦

74LVC163

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP)

NEXPERIA

安世

16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

1. General description The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and

NEXPERIA

安世

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

1. General description The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and

NEXPERIA

安世

16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

SN74LVC16373A 16-Bit Transparent D-Type Latch With 3-State Outputs

1 Features 1• Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, T

TI

德州仪器

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

1. General description The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches with 3-state outputs. The devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The devices feature two latch enables (1LE and 2LE) and two output enables (1OE and

NEXPERIA

安世

SN74LVC16373A 16-Bit Transparent D-Type Latch With 3-State Outputs

1 Features 1• Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, T

TI

德州仪器

16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

DESCRIPTION The 74LVC(H)16373A is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 or 5 V

Philips

飞利浦

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Latch-Up Performance

TI

德州仪器

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

1. General description The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bi

NEXPERIA

安世

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

ETC

知名厂家

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

Philips

飞利浦

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

ETC

知名厂家

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

ETC

知名厂家

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

Philips

飞利浦

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

1. General description The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bi

NEXPERIA

安世

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

General description The 74LVC16374A-Q100 and 74LVCH16374A-Q100 are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A-Q100 only) for each flip-flop and 3-state outputs for bus-oriented applications. It consists of two sections of eight positive edge-trig

NEXPERIA

安世

SN74LVC16374A 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

1 Features 1• Member of the Texas Instruments Widebus™ Family • Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection • S

TI

德州仪器

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

Philips

飞利浦

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

ETC

知名厂家

3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O

FEATURES: • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • CMOS power levels (0.4μ W typ. static) • All inputs, outputs, and I/O are 5V to

RENESAS

瑞萨

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

General description The 74LVC16374A-Q100 and 74LVCH16374A-Q100 are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A-Q100 only) for each flip-flop and 3-state outputs for bus-oriented applications. It consists of two sections of eight positive edge-trig

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP)

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP)

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

DESCRIPTION The 74LVC163 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Philips

飞利浦

Presettable synchronous 4-bit binary counter; synchronous reset

DESCRIPTION The 74LVC163 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Philips

飞利浦

Presettable synchronous 4-bit binary counter; synchronous reset

DESCRIPTION The 74LVC163 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Philips

飞利浦

Presettable synchronous 4-bit binary counter; synchronous reset

1. General description The 74LVC163 is a synchronous presettable binary counter which features an internal look-ahead carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (pin CP)

NEXPERIA

安世

Presettable synchronous 4-bit binary counter; synchronous reset

DESCRIPTION The 74LVC163 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8–1A • Inputs accept voltages up to 5.5 V • C

Philips

飞利浦

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

文件:212.22 Kbytes Page:17 Pages

Philips

飞利浦

3.3V CMOS 16-Bit Transparent D-Type Latch with 3-State Outputs, 5.0V Tolerant I/O

RENESAS

瑞萨

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

NEXPERIA

安世

封装/外壳:48-TFSOP(0.240",6.10mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC TRANS D-TYP LATCH 3ST 48TSSOP 集成电路(IC) 锁存器

ETC

知名厂家

封装/外壳:48-TFSOP(0.240",6.10mm 宽) 包装:管件 描述:IC TRANSPARENT LATCH 16B 48TSSOP 集成电路(IC) 锁存器

ETC

知名厂家

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

NEXPERIA

安世

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

文件:252.64 Kbytes Page:15 Pages

NEXPERIA

安世

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:456.35 Kbytes Page:15 Pages

TI

德州仪器

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:331.65 Kbytes Page:14 Pages

TI

德州仪器

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:329.51 Kbytes Page:15 Pages

TI

德州仪器

Discrete and MOSFET components, analog & logic ICs

文件:11.62183 Mbytes Page:234 Pages

NEXPERIA

安世

16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

文件:252.64 Kbytes Page:15 Pages

NEXPERIA

安世

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:456.35 Kbytes Page:15 Pages

TI

德州仪器

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:331.65 Kbytes Page:14 Pages

TI

德州仪器

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:329.51 Kbytes Page:15 Pages

TI

德州仪器

16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

文件:456.35 Kbytes Page:15 Pages

TI

德州仪器

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件:106.51 Kbytes Page:6 Pages

IDT

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件:106.51 Kbytes Page:6 Pages

IDT

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件:106.51 Kbytes Page:6 Pages

IDT

3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH

文件:106.51 Kbytes Page:6 Pages

IDT

74LVC163产品属性

  • 类型

    描述

  • 型号

    74LVC163

  • 制造商

    Integrated Device Technology Inc

  • 功能描述

    Clock Fanout Buffer 32-OUT 56-Pin SSOP

  • 制造商

    IDT from Components Direct

  • 功能描述

    74LVC16344APVG, 1-TO-4 ADDRESS/CLOCK DRIVER 3-ST 32-OUT CMOS - Rail/Tube

  • 制造商

    IDT

  • 功能描述

    IDT 74LVC16344APVG, 1-to-4 Address/Clock Driver 3-ST 32-OUT CMOS 56-Pin SSOP

更新时间:2025-11-18 16:42:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Z
24+
SSOP
6000
只做原装正品现货 欢迎来电查询15919825718
恩XP
2025+
TSSOP48
5000
原装进口价格优 请找坤融电子!
恩XP
24+
标准封装
13048
全新原装正品/价格优惠/质量保障
N/A
24+
NA/
50
优势代理渠道,原装正品,可全系列订货开增值税票
IDT
25+
3730
全新原装!优势库存热卖中!
PHI
05+
SOIC
1000
自己公司全新库存绝对有货
TI
24+
TSSOP
26200
原装现货,诚信经营!
24+
5000
公司存货
NEXPERIA
24+
N/A
8000
全新原装正品,现货销售
恩XP
25+
TSOP
32360
NXP/恩智浦全新特价74LVC16374ADG-T即刻询购立享优惠#长期有货

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  • 74LVC125AMTR-低电压CMOS四总线缓冲器(三态)高性能

    74LVC125A是一个低电压的CMOS四路总线缓冲区亚微米芯片制造门和双层金属布线C2MOS技术。它是理想的为1.65至3.6的VCC操作和低功耗和低噪音应用。 它可以连接到5V信号环境在混合3.3/5V系统的投入。这些设备都需要相同的三态控制输入G为采取高,使输出高阻抗状态。它在3.3V时低于5V的高速性能AC/ ACT的家庭,结合低功耗消费。 所有输入和输出都配备了防止静电放电保护电路,让他们2KV的静电放电抗扰度和瞬态过剩电压。 74LVC125AMTR:低电压CMOS四总线缓冲器(三态)高性能特点如下: 5V容限输入

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