位置：首页 > IC中文资料第6048页 > 74LV107PW
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LV107PW | Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 |   | |
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | PHILIPS 飞利浦 | |
74LV107PW产品属性
- 类型
描述
- 型号
74LV107PW
- 功能描述
J-K-Type Flip-Flop
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
恩XP |
24+ |
SOP14 |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
24+ |
5000 |
公司存货 |
|||||
恩XP |
22+ |
SOP14 |
20000 |
公司只有原装 品质保证 |
|||
PHI |
2447 |
SOP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
|||
25+ |
5000 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||||
PHI |
24+ |
TSSOP14 |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
TI/TEXAS |
26+ |
TSSOP |
8931 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
TI |
25+ |
TSSOP |
678 |
全新现货 |
|||
ph |
24+ |
N/A |
6980 |
原装现货,可开13%税票 |
|||
PHI |
24+ |
TSSOP14 |
6540 |
原装现货/欢迎来电咨询 |
74LV107PW芯片相关品牌
74LV107PW规格书下载地址
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74LS90：十进制计数器;十二分频计数器;4位二进制计数器 SN54/74LS90，SN54/74LS92和SN54/74LS93高速4位波纹型计数器，分割成两部分。每个计数器都有一个鸿沟由两节和一个分五（LS90），除以六（LS92）或 除以个（LS93）部分是由高向低过渡触发时钟输入。每一节都可以单独使用，或绑在了一起（问到CP），形成BCD，双向五元，模12模16计数器。所有 计数器有一个2输入门控主复位（清除），和LS90还有一个2输入与门控主设定（预设9）。 特点： •低功耗。通常为45兆瓦
2012-11-9
DdatasheetPDF页码索引
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