位置：首页 > IC中文资料第6048页 > 74LV107PWDH
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LV107PWDH | Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 |   | |
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 | | ||
Dual JK flip-flop with reset; negative-edge trigger DESCRIPTION The 74LV107 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT107. The 74LV107 is a dual negative-edge triggered JK-type flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs. The J and K | Philips 飞利浦 | |
74LV107PWDH产品属性
- 类型
描述
- 型号
74LV107PWDH
- 制造商
PHILIPS
- 制造商全称
NXP Semiconductors
- 功能描述
Dual JK flip-flop with reset; negative-edge trigger
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/TEXAS |
NEW |
TSSOP |
8931 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
恩XP |
24+ |
SOP14 |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
TI/德州仪器 |
23+ |
TSSOP14 |
4600 |
原厂授权代理,海外优势订货渠道。可提供大量库存,详 |
|||
PHI |
25+ |
TSSOP14 |
307 |
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙ |
|||
PHI |
2447 |
SOP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
|||
FSC |
TSSOP |
1000 |
正品原装--自家现货-实单可谈 |
||||
24+ |
5000 |
公司存货 |
|||||
TI |
24+ |
TSSOP |
678 |
只做原装，欢迎询价，量大价优 |
|||
PHI |
00+ |
TSSOP14 |
268 |
全新原装100真实现货供应 |
|||
TI |
25+ |
TSSOP |
678 |
全新现货 |
74LV107PWDH规格书下载地址
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2012-11-9
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