Quadruple 2-input Positive NAND Buffers

3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic level drive provide these registers with the capability of being connected directly

Quadruple 2-input Positive NAND Buffers

TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

文件：160.99 Kbytes Page：8 Pages

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

文件：249.42 Kbytes Page：7 Pages

丝印代码：74LS373；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

丝印代码：74LS374；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

Octal D-type Transparent Latches(with three-state outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic level drive provide these registers with the capability of being connected directly

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The SN54 /74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (datachanges asynchronously) when Latch Enable (LE)

Octal D-type Edge-triggered Flip-Flips(with three-state outputs)

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic level drive provide these registers with the capability of being connected directly

Octal D-Type Flip-Flop with Common Enable and Clock

General Description The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin

LOW POWER SCHOTTKY

The SN74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. • 8-Bit High Speed Parallel Registers • Positive Edge-Triggered D-Type Flip Flops • F

OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE

The SN54 /74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54/74LS378 is a 6-Bit Register with a buffered common enable. This device is similar

OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE

The SN54 /74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54/74LS378 is a 6-Bit Register with a buffered common enable. This device is similar

TRI-STATEE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

文件：160.99 Kbytes Page：8 Pages

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

文件：331.48 Kbytes Page：24 Pages

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

文件：694.69 Kbytes Page：28 Pages

Octal Transparent Latch with 3-State Outputs

文件：325.99 Kbytes Page：7 Pages

封装/外壳：20-DIP（0.300"，7.62mm） 包装：管件 描述：IC LATCH FLIP FLOP REGISTER DIP 集成电路（IC） 锁存器

Octal D-type Edge-triggered Flip-Flips(with three-state outputs)

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

文件：694.69 Kbytes Page：28 Pages

封装/外壳：20-DIP（0.300"，7.62mm） 功能：标准 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20DIP 集成电路（IC） 触发器

LOW POWER SCHOTTKY

Octal D Flip-Flop with Enable

文件：299.57 Kbytes Page：6 Pages

OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE

文件：180.21 Kbytes Page：16 Pages

OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE

文件：180.21 Kbytes Page：16 Pages

HEX D TYPE FLIP FLOP

文件：218.55 Kbytes Page：4 Pages

OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE

文件：180.21 Kbytes Page：16 Pages

QUAD 2-INPUT NAND BUFFER

QUAD 2-INPUT NAND BUFFER

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

文件：249.42 Kbytes Page：7 Pages

Quadruple 2-input Positive NAND Buffers

Ouadruple 2-input Positive NAND Gates

Quadruple 2-input Positive NAND Buffers

Quadruple 2-input Positive NAND Buffers

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

QUAD 2-INPUT NAND BUFFER