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74HCT174价格
参考价格：￥0.6333
型号：74HCT174D,652 品牌：NXP 备注：这里有74HCT174多少钱，2026年最近7天走势，今日出价，今日竞价，74HCT174批发/采购报价，74HCT174行情走势销售排行榜，74HCT174报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74HCT174 | Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | PHILIPS 飞利浦 |   | |
74HCT174 | Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | |
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | PHILIPS 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | PHILIPS 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | PHILIPS 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | PHILIPS 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 6BIT 16SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
封装/外壳：16-SSOP（0.209"，5.30mm 宽） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 6BIT 16SSOP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 文件：730.95 Kbytes Page：16 Pages | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 文件：730.95 Kbytes Page：16 Pages | NEXPERIA 安世 | |
74HCT174产品属性
- 类型
描述
- 型号
74HCT174
- 制造商
NTE Electronics
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
PHI |
25+ |
SOP14 |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
ST/意法 |
25+ |
SOP |
32000 |
ST/意法全新特价74HCT174MTR即刻询购立享优惠#长期有货 |
|||
PHI |
09+ |
SOP16 |
5500 |
原装无铅,优势热卖 |
|||
恩XP |
22+ |
N/A |
9879 |
现货,原厂原装假一罚十! |
|||
PHI |
2023+ |
SOP |
58000 |
进口原装,现货热卖 |
|||
PHI |
24+ |
SSOP |
60000 |
||||
PHI |
23+ |
SOP16 |
6000 |
原装正品假一罚百!可开增票! |
|||
ST |
2018+ |
26976 |
代理原装现货/特价热卖! |
||||
TOS |
26+ |
原厂封装 |
9526 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
PHI |
24+ |
SOP16 |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
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DdatasheetPDF页码索引
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