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74HCT174价格
参考价格：￥0.6333
型号：74HCT174D,652 品牌：NXP 备注：这里有74HCT174多少钱，2026年最近7天走势，今日出价，今日竞价，74HCT174批发/采购报价，74HCT174行情走势销售排行榜，74HCT174报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74HCT174 | Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | Philips 飞利浦 |   | |
74HCT174 | Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | |
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | Philips 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | Philips 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | Philips 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger GENERAL DESCRIPTION The 74HC/HCT174 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Six edge-triggered D-type flip-flops • Asynchronous master reset • Output cap | Philips 飞利浦 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174; 74HCT174 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requ | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 1. General description The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold | NEXPERIA 安世 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 6BIT 16SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
封装/外壳：16-SSOP（0.209"，5.30mm 宽） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 6BIT 16SSOP 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 文件：730.95 Kbytes Page：16 Pages | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger | NEXPERIA 安世 | | ||
Hex D-type flip-flop with reset; positive-edge trigger 文件：730.95 Kbytes Page：16 Pages | NEXPERIA 安世 | |
74HCT174产品属性
- 类型
描述
- 型号
74HCT174
- 制造商
NTE Electronics
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
恩XP |
2022+ |
1 |
全新原装 货期两周 |
||||
NEXPERIA |
2228 |
con |
500 |
现货常备产品原装可到京北通宇商城查价格 |
|||
恩XP |
22+ |
16DIP |
9000 |
原厂渠道,现货配单 |
|||
ST/意法 |
2021+ |
SOP |
9000 |
原装现货,随时欢迎询价 |
|||
ST |
SOP3.9MM |
25635 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
ST/意法 |
2025+ |
SOP |
5000 |
原装进口价格优 请找坤融电子! |
|||
IC贴片 |
22+ |
原廠原封 |
406 |
全新原装现货!自家库存! |
|||
PHI |
9801 |
S3 |
97 |
原装现货 |
|||
RCA |
05+ |
SOIC |
1000 |
自己公司全新库存绝对有货 |
|||
PHI |
98+ |
SOP16 |
13661 |
现货 |
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DdatasheetPDF页码索引
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