封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC BUS-INTERFACE LATCH 56TSSOP 集成电路（IC） 锁存器

20-bit bus interface D-type latch 3-State

DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR

20-bit bus interface D-type latch; 3-state

1. General description The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates.

20-bit bus interface D-type latch; 3-state

1. General description The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates.

20-bit bus interface D-type latch 3-State

DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR

20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

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