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74ALVC价格
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型号：74ALVC00BQ,115 品牌：NXP 备注：这里有74ALVC多少钱，2025年最近7天走势，今日出价，今日竞价，74ALVC批发/采购报价，74ALVC行情走势销售排行榜，74ALVC报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power | Fairchild 仙童半导体 |   | ||
Quad 2-input NAND gate DESCRIPTION The 74ALVC00 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC00 provides the 2-input NAND fu | Philips 飞利浦 | | ||
Quad 2-input NAND gate 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption | NEXPERIA 安世 | | ||
Quad 2-input NAND gate DESCRIPTION The 74ALVC00 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC00 provides the 2-input NAND fu | Philips 飞利浦 | | ||
Quad 2-input NAND gate 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption | NEXPERIA 安世 | | ||
Quad 2-input NAND gate DESCRIPTION The 74ALVC00 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC00 provides the 2-input NAND fu | Philips 飞利浦 | | ||
Quad 2-input NAND gate 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption | NEXPERIA 安世 | | ||
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The ALVC00 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power | Fairchild 仙童半导体 | | ||
Quad 2-input NAND gate DESCRIPTION The 74ALVC00 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC00 provides the 2-input NAND fu | Philips 飞利浦 | | ||
Quad 2-input NAND gate 1. General description The 74ALVC00 is a quad 2-input NAND gate. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption | NEXPERIA 安世 | | ||
Quad 2-input NOR gate DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun | Philips 飞利浦 | | ||
Quad 2-input NOR gate 1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con | NEXPERIA 安世 | | ||
Quad 2-input NOR gate DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun | Philips 飞利浦 | | ||
Quad 2-input NOR gate 1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con | NEXPERIA 安世 | | ||
Quad 2-input NOR gate DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun | Philips 飞利浦 | | ||
Quad 2-input NOR gate 1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con | NEXPERIA 安世 | | ||
Quad 2-input NOR gate DESCRIPTION The 74ALVC02 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC02 provides the 2-input NOR fun | Philips 飞利浦 | | ||
Quad 2-input NOR gate 1. General description The 74ALVC02 is a quad 2-input NOR gate. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. 2. Features and benefits • Wide supply voltage range from 1.65 V to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power con | NEXPERIA 安世 | | ||
Hex inverter 1. General description The 74ALVC04 is a hex inverter. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigger action | NEXPERIA 安世 | | ||
Hex inverter 1. General description The 74ALVC04 is a hex inverter. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigger action | NEXPERIA 安世 | | ||
Hex inverter 1. General description The 74ALVC04 is a hex inverter. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigger action | NEXPERIA 安世 | | ||
Hex inverter 1. General description The 74ALVC04 is a hex inverter. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigger action | NEXPERIA 安世 | | ||
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d | Fairchild 仙童半导体 | | ||
Quad 2-input AND gate 1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge | NEXPERIA 安世 | | ||
Quad 2-input AND gate DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun | Philips 飞利浦 | | ||
Quad 2-input AND gate DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun | Philips 飞利浦 | | ||
Quad 2-input AND gate 1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge | NEXPERIA 安世 | | ||
Quad 2-input AND gate DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun | Philips 飞利浦 | | ||
Quad 2-input AND gate 1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge | NEXPERIA 安世 | | ||
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power d | Fairchild 仙童半导体 | | ||
Quad 2-input AND gate DESCRIPTION The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. The 74ALVC08 provides the 2-input AND fun | Philips 飞利浦 | | ||
Quad 2-input AND gate 1. General description The 74ALVC08 is a quad 2-input AND gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Schmitt-trigge | NEXPERIA 安世 | | ||
Quad buffer/line driver; 3-state DESCRIPTION The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. FEATURES • Wide supply voltage range fr | Philips 飞利浦 | | ||
Quad buffer/line driver; 3-state 1. General description The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. 2. Features and benefits • Wide supply | NEXPERIA 安世 | | ||
Quad buffer/line driver; 3-state 1. General description The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. 2. Features and benefits • Wide supply | NEXPERIA 安世 | | ||
Quad buffer/line driver 3-state General description The 74ALVC125-Q100 is a quad non-inverting buffer/line driver with 3-state outputs. The output enable input (nOE) controls the 3 state outputs (nY). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotiv | NEXPERIA 安世 | | ||
Quad buffer/line driver; 3-state DESCRIPTION The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. FEATURES • Wide supply voltage range fr | Philips 飞利浦 | | ||
Quad buffer/line driver; 3-state 1. General description The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. 2. Features and benefits • Wide supply | NEXPERIA 安世 | | ||
Quad buffer/line driver 3-state General description The 74ALVC125-Q100 is a quad non-inverting buffer/line driver with 3-state outputs. The output enable input (nOE) controls the 3 state outputs (nY). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotiv | NEXPERIA 安世 | | ||
Quad buffer/line driver; 3-state DESCRIPTION The 74ALVC125 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times. FEATURES • Wide supply voltage range fr | Philips 飞利浦 | | ||
Quad buffer/line driver; 3-state 1. General description The 74ALVC125 is a quad non-inverting buffer/line driver with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. 2. Features and benefits • Wide supply | NEXPERIA 安世 | | ||
Quad buffer/line driver 3-state General description The 74ALVC125-Q100 is a quad non-inverting buffer/line driver with 3-state outputs. The output enable input (nOE) controls the 3 state outputs (nY). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotiv | NEXPERIA 安世 | | ||
Quad buffer/line driver 3-state General description The 74ALVC125-Q100 is a quad non-inverting buffer/line driver with 3-state outputs. The output enable input (nOE) controls the 3 state outputs (nY). A HIGH on the nOE pin causes the outputs to assume a high-impedance OFF-state. This product has been qualified to the Automotiv | NEXPERIA 安世 | | ||
Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs General Description The ALVC132 contains four 2-input NAND gates with Schmitt Trigger Inputs. The pin configuration and function are the same as the ALVC00 except the inputs have hysteresis between the positive-going and negative-going input thresholds. This hysteresis is useful for transforming | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs General Description The ALVC132 contains four 2-input NAND gates with Schmitt Trigger Inputs. The pin configuration and function are the same as the ALVC00 except the inputs have hysteresis between the positive-going and negative-going input thresholds. This hysteresis is useful for transforming | Fairchild 仙童半导体 | | ||
Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs General Description The ALVC132 contains four 2-input NAND gates with Schmitt Trigger Inputs. The pin configuration and function are the same as the ALVC00 except the inputs have hysteresis between the positive-going and negative-going input thresholds. This hysteresis is useful for transforming | Fairchild 仙童半导体 | | ||
Hex inverting Schmitt trigger General description The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals int | Philips 飞利浦 | | ||
Hex inverting Schmitt trigger 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered do | NEXPERIA 安世 | | ||
Hex inverting Schmitt trigger General description The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals int | Philips 飞利浦 | | ||
Hex inverting Schmitt trigger 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered do | NEXPERIA 安世 | | ||
Hex inverting Schmitt trigger General description The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals int | Philips 飞利浦 | | ||
Hex inverting Schmitt trigger 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered do | NEXPERIA 安世 | | ||
Hex inverting Schmitt trigger General description The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals int | Philips 飞利浦 | | ||
Hex inverting Schmitt trigger 1. General description The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered do | NEXPERIA 安世 | |
74ALVC产品属性
- 类型
描述
- 型号
74ALVC
- 制造商
FAIRCHILD
- 制造商全称
Fairchild Semiconductor
- 功能描述
Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
onsemi(安森美) |
24+ |
TSSOP14 |
2669 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
FAIRCHILD/仙童 |
24+ |
NA/ |
17650 |
原装现货,当天可交货,原型号开票 |
|||
FAIRCHI |
24+ |
TSSOP |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
NEXPERIA/安世 |
2450+ |
NA |
9850 |
只做原厂原装正品现货或订货假一赔十! |
|||
FAIRCHILD |
25+ |
TSSOP |
30000 |
代理全新原装现货,价格优势 |
|||
恩XP |
24+ |
TSSOP-16 |
30000 |
原装正品公司现货,假一赔十! |
|||
恩XP |
21+ |
TSSOP-16 |
8080 |
只做原装,质量保证 |
|||
FSC/ON |
23+ |
原包装原封 □□ |
32390 |
原装进口特价供应 特价，原装元器件供应，支持开发样品 更多详细咨询 库存 |
|||
PHI |
NEW |
TSSOP |
12300 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
TI/德州仪器 |
23+ |
TSSOP |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
74ALVC芯片相关品牌
74ALVC规格书下载地址
74ALVC参数引脚图相关
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74ALVC数据表相关新闻
74AHCU04PW-Q100J
进口代理
2023-9-2874AHC273PW,118
进口代理
2022-11-1274AUP1G07GW,125
https://hfx03.114ic.com/
2022-3-874AHCT1G125GW Nexperia 20+ 5000 SOT353
74AHCT1G125GW Nexperia20+5000SOT353
2022-3-274AUP1G08GX只做原装现货绝不虚报
焕盛达竭诚为您提供一站式配套服务。当天下单，当天发货；
2020-9-3074ALVCH32973ZKER
74ALVCH32973ZKER，全新原装当天发货或门市自取0755-82732291.
2020-4-5
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- P105
- P106
- P107
