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74ACT112价格
参考价格：￥14.3347
型号：74ACT11240DW 品牌：TI 备注：这里有74ACT112多少钱，2026年最近7天走势，今日出价，今日竞价，74ACT112批发/采购报价，74ACT112行情走势销售排行榜，74ACT112报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm | TI 德州仪器 |   | ||
丝印代码：ACT11240；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm | TI 德州仪器 | | ||
丝印代码：ACT11240；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Sm | TI 德州仪器 | | ||
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：AT244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：AT244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：ACT11244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：ACT11244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：ACT11244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：AT244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：AT244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
丝印代码：AT244；OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：ACT11245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：ACT11245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：ACT11245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：ACT11245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：ACT11245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：AT245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
丝印代码：AT245；OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at | TI 德州仪器 | | ||
8-INPUT MULTIPLEXER 8-input multiplexer (3-State) | PHILIPS 飞利浦 | | ||
8-INPUT MULTIPLEXER 8-input multiplexer (3-State) | PHILIPS 飞利浦 | | ||
8-INPUT MULTIPLEXER 8-input multiplexer (3-State) | PHILIPS 飞利浦 | | ||
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible 3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Im | TI 德州仪器 | | ||
丝印代码：ACT11257；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible 3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Im | TI 德州仪器 | | ||
丝印代码：ACT11257；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible 3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Im | TI 德州仪器 | | ||
丝印代码：ACT11257；QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS Inputs Are TTL-Voltage Compatible 3-State Outputs Interface Directly With System Bus Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Im | TI 德州仪器 | | ||
9-bit odd/even parity generator/checker with bus drive l/O port DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families. | PHILIPS 飞利浦 | | ||
9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125 | TI 德州仪器 | | ||
9-bit odd/even parity generator/checker with bus drive l/O port DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families. | PHILIPS 飞利浦 | | ||
丝印代码：ACT11286；9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125 | TI 德州仪器 | | ||
丝印代码：ACT11286；9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125 | TI 德州仪器 | | ||
9-bit odd/even parity generator/checker with bus drive l/O port DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families. | PHILIPS 飞利浦 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：96.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：109.69 Kbytes Page：8 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：109.69 Kbytes Page：8 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：109.69 Kbytes Page：8 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：96.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：109.69 Kbytes Page：8 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：96.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：96.08 Kbytes Page：7 Pages | TI 德州仪器 | | ||
3-LINE TO 8-LINE DECODER/DEMULTIPLEXER 文件：109.69 Kbytes Page：8 Pages | TI 德州仪器 | | ||
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 文件：548.3 Kbytes Page：12 Pages | TI 德州仪器 | | ||
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 文件：85.59 Kbytes Page：5 Pages | TI 德州仪器 | | ||
OCTAL BUFFER/LINE DRIVER WITH 3-STATE OUTPUTS 文件：85.59 Kbytes Page：5 Pages | TI 德州仪器 | |
74ACT112产品属性
- 类型
描述
- 型号
74ACT112
- 制造商
TI
- 功能描述
11208 TI
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
25+ |
- |
22360 |
样件支持,可原厂排单订货! |
|||
TI |
25+ |
- |
22412 |
正规渠道,免费送样。支持账期,BOM一站式配齐 |
|||
TI |
20+ |
20SSOP |
53650 |
TI原装主营-可开原型号增税票 |
|||
TI |
25+ |
550 |
公司优势库存 热卖中!! |
||||
TI |
95+ |
SOP3.9 |
3769 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
TI |
2023+ |
20-SSOP |
50000 |
原装现货 |
|||
Texas Instruments |
24+25+ |
16500 |
全新原厂原装现货!受权代理!可送样可提供技术支持! |
||||
TI/TEXAS |
26+ |
20-SSOP |
8931 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
TI |
22+ |
20SSOP |
9000 |
原厂渠道,现货配单 |
|||
ti |
24+ |
N/A |
6980 |
原装现货,可开13%税票 |
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DdatasheetPDF页码索引
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