9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125

9-bit odd/even parity generator/checker with bus drive l/O port

DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families.

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

文件：99.44 Kbytes Page：6 Pages

9-bit odd/even parity generator/checker with bus drive l/O port

DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families.

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

文件：99.44 Kbytes Page：6 Pages