9-bit odd/even parity generator/checker with bus drive l/O port

DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families.

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125

具有总线驱动器奇偶校验 I/O 端口的 9 位奇偶校验发生器/校验器

The 74ACT11286 universal 9-bit parity generator/checker features a local output for parity checking and a bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by cascading.\nThe control input is implemented specifically to accommodate cascading. • Inputs Are TTL-Voltage Compatible• Generates Either Odd or Even Parity for Nine Data Lines• Cascadable for n-Bits Parity• Center-Pin VCC and GND Configurations MinimizeHigh-Speed Switching Noise• EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process• 500-mA Typical Latch-Up Immunity at 125°C• P;

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

文件：99.44 Kbytes Page：6 Pages

丝印代码：ACT11286；9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125

9-bit odd/even parity generator/checker with bus drive l/O port

DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families.

丝印代码：ACT11286；9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

Inputs Are TTL-Voltage Compatible Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Parity Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-
m Process 500-mA Typical Latch-Up Immunity at 125

9-bit odd/even parity generator/checker with bus drive l/O port

DESCRIPTION The 74AC/ACT11268 high-performance CMOS device combine very high speed and high output drive comparable to the most advanced TTL families.

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

文件：99.44 Kbytes Page：6 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PARITY GEN/CHKER 9-BIT 14SOIC 集成电路（IC） 奇偶校验发生器和校验器

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

文件：99.44 Kbytes Page：6 Pages

封装/外壳：14-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC PARITY GEN/CHKER 9-BIT 14DIP 集成电路（IC） 奇偶校验发生器和校验器