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7486价格
参考价格:¥27.3596
型号:7486 品牌:Arrow Hart / Cooper 备注:这里有7486多少钱,2025年最近7天走势,今日出价,今日竞价,7486批发/采购报价,7486行情走势销售排行榜,7486报价。型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
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7486 | Quad 2-Input Exclusive-OR Gate General Description This device contains four independent gates each of which performs the logic exclusive-OR function. | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | ||
7486 | 7/8 Diameter 5-Turn Wirewound Precision Potentiometer SPECIAL FEATURES Center Tap Linearity Tape Rear Shaft Extension Flatted Shaft Slotted Shaft (Standard on single gang 7486 without RS) Shaft Lock (7481, 7486 only) High Torque 2–6 oz.-in. (7486 only) Additional Gangs Gold plated solder lug terminals (See optional | BITECH 瑞谷拜特 | ||
7486 | 7/8 Diameter 5-Turn Wirewound Precision Potentiometer SPECIAL FEATURES Center Tap Linearity Tape Rear Shaft Extension Flatted Shaft Slotted Shaft (Standard on single gang 7486 without RS) Shaft Lock (7481, 7486 only) High Torque 2–6 oz.-in. (7486 only) Additional Gangs Gold plated solder lug terminals (See optional | BITECH 瑞谷拜特 | ||
7486 | 包装:散装 描述:SCOTCH-BRITE ROLOC SURFACE CONDI 工具 磨料和表面修整产品 | 3M | ||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
1:1 AND 1:2 REGISTERED BUFFER WITH 1.8V SSTL I/O FEATURES: • 1:1 and 1:2 registered buffer • 1.8V Operation • SSTL_18 style clock and data inputs • Differential CLK input • Control inputs compatible with LVCMOS levels • Flow-through architecture for optimum PCB design • Latch-up performance exceeds 100mA • ESD >2000V per MIL-STD-883, Met | RENESAS 瑞萨 | |||
Eaton safety grip locking flanged inlet, #16-12 AWG, 15A, Industrial, 125/250V, Back wiring, Black, Midget, ML3, Three-pole, Three-wire, Nylon Special features Midget locking | EATON 伊顿 | |||
7/8 Diameter 5-Turn Wirewound Precision Potentiometer SPECIAL FEATURES Center Tap Linearity Tape Rear Shaft Extension Flatted Shaft Slotted Shaft (Standard on single gang 7486 without RS) Shaft Lock (7481, 7486 only) High Torque 2–6 oz.-in. (7486 only) Additional Gangs Gold plated solder lug terminals (See optional | BITECH 瑞谷拜特 | |||
Wiha Quality Tools Toll Free: (800) 494-6104 文件:470.28 Kbytes Page:2 Pages | etc2List of Unclassifed Manufacturers etc未分类制造商etc2未分类制造商 | |||
包装:散装 描述:SQUARE POWER BIT #2 X 50MM 2PK 工具 螺丝和螺母起子 - 刀头、刀片和手柄 | Wiha 威汉 | |||
Wiha Quality Tools Toll Free: (800) 494-6104 文件:470.28 Kbytes Page:2 Pages | etc2List of Unclassifed Manufacturers etc未分类制造商etc2未分类制造商 | |||
Wiha Quality Tools Toll Free: (800) 494-6104 文件:470.28 Kbytes Page:2 Pages | etc2List of Unclassifed Manufacturers etc未分类制造商etc2未分类制造商 | |||
Digital Temperature Sensor with SST Interface GENERAL DESCRIPTION The ADT7484A/ADT7486A are simple digital temperature sensors for use in PC applications with a Simple Serial Transport (SST) interface. These devices can monitor their own temperature as well as the temperature of one (ADT7484A) or two (ADT7486A) remote sensor diodes. The ADT7 | AD 亚德诺 |
替换型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
---|---|---|---|---|
Quad 2-Input Exclusive-OR Gates | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | NSC | ||
Quad 2-Input Exclusive-OR Gate | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | ||
TTL HD74/HD74S Series | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | ||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES | TI 德州仪器 | TI | ||
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES | TI 德州仪器 | TI |
7486产品属性
- 类型
描述
- 型号
7486
- 制造商
HUBBELL
- 功能描述
7486 MIDGET TWIST-LOCK INLET
- 制造商
Cooper Wiring Devices
- 制造商
3M Electronic Products Division
- 功能描述
7486 3" MEDIUM ROLOC SURFACE CONDITIONING
- 制造商
Hubbell Premise Wiring
- 制造商
Semiconductors
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
24+ |
DIP-14 |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
TE |
23+ |
NA |
25800 |
TE全系列在售国内外渠道 |
|||
AMP |
24+/25+ |
18 |
原装正品现货库存价优 |
||||
1 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
||||||
Amphenol |
61 |
公司优势库存 热卖中!! |
|||||
S |
QQ咨询 |
PDIP |
825 |
全新原装 研究所指定供货商 |
|||
TE |
21+ |
标准封装 |
58 |
保证原装正品,需要请联系张小姐13544103396 |
|||
SIGN |
23+ |
NA |
9856 |
原装正品,假一罚百! |
|||
CRABIL MANUFACTURING |
23+ |
SMD |
880000 |
明嘉莱只做原装正品现货 |
|||
AMPHENOL/安费诺 |
2508+ |
/ |
309575 |
一级代理,原装现货 |
7486规格书下载地址
7486参数引脚图相关
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7486数据表相关新闻
747375-8原装现货特价出
747375-8原装现货特价出
2024-10-19749020111A
优势渠道
2023-6-147490220120
优势渠道
2023-4-774479887310A
74479887310A
2021-12-237499111221A
7499111221A
2020-9-287460408
7460408
2020-9-27
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