71T75802价格

参考价格:¥169.7607

型号:71T75802S133PFGI 品牌:IDT 备注:这里有71T75802多少钱,2025年最近7天走势,今日出价,今日竞价,71T75802批发/采购报价,71T75802行情走势销售排行榜,71T75802报价。
型号 功能描述 生产厂家 企业 LOGO 操作
71T75802

2.5V 1M X 18 ZBT Synchronous 2.5V I/O PipeLine SRAM

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

512K x 36, 1M x 18 2.5V Synchronous ZBT™ SRAMs 2.5V I/O, Burst Counter Pipelined Outputs

Features ◆ 512K x 36, 1M x 18 memory configurations ◆ Supports high performance system speed - 200 MHz (3.2 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W

RENESAS

瑞萨

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

Synchronous ZBT SRAMs

文件:1.29206 Mbytes Page:23 Pages

IDT

71T75802产品属性

  • 类型

    描述

  • 型号

    71T75802

  • 功能描述

    静态随机存取存储器

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2025-12-28 23:00:00
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IDT全新特价71T75802S133PF即刻询购立享优惠#长期有货

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