封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC CLOCK MULTIPLIER 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

时钟发生器及支持产品 LOW PHASE NOISE CLOCK MULTIPLIER

Low Phase Noise Clock Multiplier

Description The ICS601-02 is a low cost, low phase noise, high performance clock synthesizer for any application that requires low phase noise and low jitter. The ICS601 is ICS’ lowest phase noise multiplier. Using ICS’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip acce

Low Phase Noise Clock Multiplier

Description The ICS601-02 is a low cost, low phase noise, high performance clock synthesizer for any application that requires low phase noise and low jitter. The ICS601 is ICS’ lowest phase noise multiplier. Using ICS’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip acce

LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-02 is a low cost, low phase noise, high performance clock synthesizer for any application that requires low phase noise and low jitter. The ICS601 is IDT’s lowest phase noise multiplier. Using IDT’s patented analog and digital Phase Locked Loop (PLL) techniques, the chip ac

LOW PHASE NOISE CLOCK MULTIPLIER

Features • Packaged in 16-pin SOIC (Pb free) • Uses fundamental 10 - 27 MHz crystal or clock • Patented PLL with the lowest phase noise • Output clocks up to 170 MHz at 3.3 V • Output Enable function tri-states outptus • Low phase noise: -132 dBc/Hz at 10 kHz • Low jitter - 18 ps one sigma

Low Phase Noise Clock Multiplier

Description The ICS601-02 is a low cost, low phase noise, high performance clock synthesizer for any application that requires low phase noise and low jitter. The ICS601 is ICS’ lowest phase noise multiplier. Using ICS’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip acce