LOW PHASE NOISE CLOCK MULTIPLIER

Features • Fully integrated PLL, no external loop filter required • Differential 3.3 V LVPECL outputs • Uses fundamental crystal or clock — Crystal input frequency: 10 to 27MHz — Clock input: 10 to 38MHz (mulitply by 6) 10 to 31MHz (all other multiply settings) • Output clocks up to 230 MHz

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLOCK MULTIPLIER 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW PHASE NOISE CLOCK MULTIPLIER

Features • Fully integrated PLL, no external loop filter required • Differential 3.3 V LVPECL outputs • Uses fundamental crystal or clock — Crystal input frequency: 10 to 27MHz — Clock input: 10 to 38MHz (mulitply by 6) 10 to 31MHz (all other multiply settings) • Output clocks up to 230 MHz

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLOCK MULTIPLIER 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-21 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is ICS’ lowest phase noise multiplier. Using ICS’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip accepts a 10 -

LOW PHASE NOISE CLOCK MULTIPLIER

Description The ICS601-21 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise and low jitter. It is ICS’ lowest phase noise multiplier. Using ICS’ patented analog and digital Phase Locked Loop (PLL) techniques, the chip accepts a 10 -