丝印代码：548A；TCA9548A Low-Voltage 8-Channel I2C Switch with Reset

1 Features • 1-to-8 Bidirectional translating switches • I2C Bus and SMBus compatible • Active-low reset input • Three address pins, allowing up to eight TCA9548A devices on the I2C bus • Channel selection through an I2C Bus, in any combination • Power up with all switch channels deselecte

丝印代码：548A；TCA9548A Low-Voltage 8-Channel I2C Switch with Reset

1 Features . 1-to-8 Bidirectional translating switches . I2C Bus and SMBus compatible . Active-low reset input . Three address pins, allowing up to eight TCA9548A devices on the I2C bus . Channel selection through an I2C Bus, in any combination . Power up with all switch channels deselecte

丝印代码：548A；TCA9548A Low-Voltage 8-Channel I2C Switch with Reset

1 Features . 1-to-8 Bidirectional translating switches . I2C Bus and SMBus compatible . Active-low reset input . Three address pins, allowing up to eight TCA9548A devices on the I2C bus . Channel selection through an I2C Bus, in any combination . Power up with all switch channels deselecte

NPN Silicon Amplifier Transistor 625mW

Features • Lead Free Finish/RoHS Compliant (P Suffix designates RoHS Compliant. See ordering information) • Through Hole Package • 150°C Junction Temperature • Epoxy meets UL 94 V-0 flammability rating • Moisure Sensitivity Level 1 • Halogen free available upon request by adding suffix

丝印代码：548AM-03LF；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

丝印代码：548AM-03LF；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

丝印代码：548AMI03LF；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

丝印代码：548AMI03LF；LOW SKEW CLOCK INVERTER AND DIVIDER

Features • Packaged in 16-pin SOIC (150 mil) • Input clock up to 160 MHz in the non-PLL mode • Provides clock outputs of CLK, CLK, and CLK/2 • Low skew (500 ps) on CLK, CLK, and CLK/2 • All outputs can be tri-stated • Entire chip can be powered down by changing one or two select pins • 3.3

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC CLK INVERTER/DIVIDER 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC CLK INVERTER/DIVIDER 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Amplifier Transistors(NPN Silicon)

Amplifier Transistors NPN Silicon Features • Pb−Free Packages are Available*

Amplifier Transistors

Amplifier Transistors(NPN Silicon)

Amplifier Transistors NPN Silicon Features • Pb−Free Packages are Available*

Amplifier Transistors(NPN Silicon)

Amplifier Transistors NPN Silicon Features • Pb−Free Packages are Available*

UHF push-pull power MOS transistor

DESCRIPTION Dual push-pull silicon N-channel enhancement mode vertical D-MOS transistor designed for communications transmitter applications in the UHF frequency range. The transistor is encapsulated in a 4-lead, SOT262A2 balanced flange package, with two ceramic caps. The mounting flange provid