Noise Filters

文件：3.47095 Mbytes Page：51 Pages

烟雾探测器

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AC02I；Single-Supply Analog Interface Circuit

Features • General-Purpose Signal-Processing Analog Front End (AFE) • Single 5-V Power Supply • Power Dissipation . . . 100 mW Typ • Signal-to-Distortion Ratio . . . 70 dB Typ • Programmable Filter Bandwidths (Up to 10.8 kHz) and Synchronous ADC and DAC Sampling • Serial-Port Interface • Mo

丝印代码：320AC02I；Single-Supply Analog Interface Circuit

Features • General-Purpose Signal-Processing Analog Front End (AFE) • Single 5-V Power Supply • Power Dissipation . . . 100 mW Typ • Signal-to-Distortion Ratio . . . 70 dB Typ • Programmable Filter Bandwidths (Up to 10.8 kHz) and Synchronous ADC and DAC Sampling • Serial-Port Interface • Mo

丝印代码：320AD545I；Single Channel Data/Fax Codec

Features • Analog, Digital, and Monitor Amp Power Supplies: 5 V or 3.3 V • Differential and Single-Ended Driving of Analog Output • Software Power-Down Mode • Sample Rate Up to 11.025 kHz • 16-Bit Signal Processing in the Codec With 2s-Complement Data Format • Typical 80-db Dynamic Range •

丝印代码：320AD545I；Single Channel Data/Fax Codec

Features • Analog, Digital, and Monitor Amp Power Supplies: 5 V or 3.3 V • Differential and Single-Ended Driving of Analog Output • Software Power-Down Mode • Sample Rate Up to 11.025 kHz • 16-Bit Signal Processing in the Codec With 2s-Complement Data Format • Typical 80-db Dynamic Range •

丝印代码：320AD545；Single Channel Data/Fax Codec

Features • Analog, Digital, and Monitor Amp Power Supplies: 5 V or 3.3 V • Differential and Single-Ended Driving of Analog Output • Software Power-Down Mode • Sample Rate Up to 11.025 kHz • 16-Bit Signal Processing in the Codec With 2s-Complement Data Format • Typical 80-db Dynamic Range •

丝印代码：320AD545；Single Channel Data/Fax Codec

Features • Analog, Digital, and Monitor Amp Power Supplies: 5 V or 3.3 V • Differential and Single-Ended Driving of Analog Output • Software Power-Down Mode • Sample Rate Up to 11.025 kHz • 16-Bit Signal Processing in the Codec With 2s-Complement Data Format • Typical 80-db Dynamic Range •

丝印代码：320AIC10C；General-Purpose 3 Vito 5.5V 16-Bit 22-KSPS DSP CODEC

Features • C54xx software driver available • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sam

丝印代码：320AIC10C；General-Purpose 3 Vito 5.5V 16-Bit 22-KSPS DSP CODEC

Features • C54xx software driver available • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sam

丝印代码：320AIC10I；General-Purpose 3 Vito 5.5V 16-Bit 22-KSPS DSP CODEC

Features • C54xx software driver available • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sam

丝印代码：320AIC10I；General-Purpose 3 Vito 5.5V 16-Bit 22-KSPS DSP CODEC

Features • C54xx software driver available • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sam

丝印代码：320AIC10I；General-Purpose 3 Vito 5.5V 16-Bit 22-KSPS DSP CODEC

Features • C54xx software driver available • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sam

丝印代码：320AIC11C；General-Purpose Low-Voltage 1.1 V to 3.6 V I/O 16-Bit 22.KSPS DSP CODEC

1.1 Features • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps – 90-dB S

丝印代码：320AIC11C；General-Purpose Low-Voltage 1.1 V to 3.6 V I/O 16-Bit 22.KSPS DSP CODEC

1.1 Features • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps – 90-dB S

丝印代码：320AIC11I；General-Purpose Low-Voltage 1.1 V to 3.6 V I/O 16-Bit 22.KSPS DSP CODEC

1.1 Features • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps – 90-dB S

丝印代码：320AIC11I；General-Purpose Low-Voltage 1.1 V to 3.6 V I/O 16-Bit 22.KSPS DSP CODEC

1.1 Features • 16-bit oversampling sigma-delta A/D converter • 16-bit oversampling sigma-delta D/A converter • Maximum output conversion rate: – 22 ksps with on-chip FIR filter – 88 ksps with FIR bypassed • Voiceband bandwidth in FIR-bypassed mode and final sampling rate at 8 ksps – 90-dB S

丝印代码：320AIC12C；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12C；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC12I；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC13I；SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC13 implements the smart time division multiplexed serial port (SMARTDM). This design innovation optimizes the DSP performance with an advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The S

丝印代码：320AIC13I；SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC13 implements the smart time division multiplexed serial port (SMARTDM). This design innovation optimizes the DSP performance with an advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The S

丝印代码：320AIC14C；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14C；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14C；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14C；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14I；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14I；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14I；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14I；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14I；Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC14KI；LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

FEATURES · Mono 16-Bit Oversampling Sigma-Delta A/D Converter · Mono 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Samplin

丝印代码：320AIC15I；SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC15 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC15I；SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC15 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

丝印代码：320AIC20C；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20C；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC22CTLV；DUAL VOICE OVER INTERNET PROTOCOL (VoIP) CODEC

Two 16-Bit Analog-to-Digital Converters (ADCs) Two 16-Bit Digital-to-Analog Converters (DACs) Programmable Input/Output Gain Analog Crosspoint to Connect the Two Coders/Decoders (Codecs) to Any of the I/O Ports – Controlled Through the Serial Port or the Inter-Integrated Circuit (I2C) Bus