Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

封装/外壳：48-TQFP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CODEC 16BIT DUAL PROG 48-TQFP 集成电路（IC） 编解码器

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC13 implements the smart time division multiplexed serial port (SMARTDM). This design innovation optimizes the DSP performance with an advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The S

Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

文件：1.61033 Mbytes Page：56 Pages

PRODUCT NOTIFICATION

文件：330.63 Kbytes Page：50 Pages

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli