Registered Hex PECL/TTL Translator

Description The MC10H/100H607 is a 6−bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset c

REGISTERED HEX PECL-TO-TTL

DESCRIPTION The SY10/100H607 are 6-bit, registered, dual supply PECL-to-TTL translators. The devices feature differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 15mA source drive capability for driving high fanout loads. The asynchronous master reset control is a

REGISTERED HEX PECL-TO-TTL

DESCRIPTION The SY10/100H607 are 6-bit, registered, dual supply PECL-to-TTL translators. The devices feature differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 15mA source drive capability for driving high fanout loads. The asynchronous master reset control is a

REGISTERED HEX PECL-TO-TTL

文件：65.31 Kbytes Page：5 Pages

REGISTERED HEX PECL-TO-TTL

文件：65.31 Kbytes Page：5 Pages