64K X 8 ELECTRICALLY ERASABLE EPROM

GENERAL DESCRIPTION The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL

64K x 8 ELECTRICALLY ERASABLE EPROM

64K X 8 ELECTRICALLY ERASABLE EPROM

GENERAL DESCRIPTION The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL

64K X 8 ELECTRICALLY ERASABLE EPROM

GENERAL DESCRIPTION The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL

64K X 8 ELECTRICALLY ERASABLE EPROM

GENERAL DESCRIPTION The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL

64K X 8 ELECTRICALLY ERASABLE EPROM

GENERAL DESCRIPTION The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL

64K X 8 ELECTRICALLY ERASABLE EPROM

512K 64K x 8 Multiplexed Addresses/ Outputs OTP EPROM

Description The AT27C520 is a low-power, high performance 524,288 bit one-time programmable read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches for the 8 lower order address bits to multiplex with the 8 data bits. This minimizes system chip count, reduces cost, and sim