2A DDR BUS TERMINATION REGULATOR

文件：207.66 Kbytes Page：7 Pages

2A DDR BUS TERMINATION REGULATOR

文件：184.35 Kbytes Page：6 Pages

2A DDR BUS TERMINATION REGULATOR

文件：184.35 Kbytes Page：6 Pages

2A DDR BUS TERMINATION REGULATOR

文件：207.66 Kbytes Page：7 Pages

2A DDR BUS TERMINATION REGULATOR

文件：207.66 Kbytes Page：7 Pages

2A DDR BUS TERMINATION REGULATOR

文件：184.35 Kbytes Page：6 Pages

High Current RF Chokes

Special Features • Very high current capacity • Low DCR • Ferrite core • VW-1 rated shrink tubing to cover winding • Fixed lead spacing • Operating temperature -55 to +105°C • Current to cause 5 maximum inductance drop or 35°C maximum temperature rise

Serial-Input Voltage-Output, 12-/16-Bit DAC

GENERAL DESCRIPTION The AD5541A/AD5542A/AD5512A1 are single, 16-/16-/12-bit, serial input, unbuffered voltage output digital-to-analog converters (DACs) that operate from a single 2.7 V to 5.5 V supply. The AD5541A/AD5542A/AD5512A utilize a versatile 3-wire interface that is compatible with a 50

2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-/12-Bit nanoDACs in LFCSP

GENERAL DESCRIPTION The AD5541A/AD5542A/AD5512A1 are single, 16-/16-/12-bit, serial input, unbuffered voltage output digital-to-analog converters (DACs) that operate from a single 2.7 V to 5.5 V supply. The AD5541A/AD5542A/AD5512A utilize a versatile 3-wire interface that is compatible with a 50

High Current Chokes

文件：469.54 Kbytes Page：1 Pages

In-System Programmable 3.3V SuperWIDE??High Density PLD

文件：331.38 Kbytes Page：26 Pages