型号 功能描述 生产厂家 企业 LOGO 操作
U74HCT573

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:188.46 Kbytes Page:5 Pages

UTC

友顺

U74HCT573

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:208.37 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:208.37 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:188.46 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:208.37 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:208.37 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:208.37 Kbytes Page:5 Pages

UTC

友顺

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件:188.46 Kbytes Page:5 Pages

UTC

友顺

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

PHILIPS

飞利浦

Octal D-type transparent latch 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

PHILIPS

飞利浦

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

NEXPERIA

安世

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

NEXPERIA

安世

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

PHILIPS

飞利浦

更新时间:2026-3-10 18:58:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
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20+
TSSOP-14
67500
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24+
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22480
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2450+
TSSOP-14T/R
9850
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UTC/友顺
25+
SOP
880000
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21+
SOP-14
6856
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2223+
TSSOP-14
26800
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UTC/实单价优
24+
TSSOP14
3000
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UTC
25+
TSSOP-14
15000
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2023+
TSSOP-14
2392
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专业铁帽
TSSOP-14
2424
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