Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

Octal D-type transparent latch; 3-state

1. General description The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

Octal D-type transparent latch; 3-state

The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresp • Input levels:• For 74HC573: CMOS level\n• For 74HCT573: TTL level\n\n• Inputs and outputs on opposite sides of package allowing easy interface with microprocessors\n• Useful as input or output port for microprocessors and microcomputers\n• 3-state non-inverting outputs for bus-oriented application;

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

Octal D-type transparent latch; 3-state

The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time i • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC573-Q100: CMOS level\n• For 74HCT573-Q100: TTL level\n\n• Inputs and outputs on opposite sides of package allowing easy interface with micr;

Octal D-type transparent latch; 3-state

The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time i • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC573-Q100: CMOS level\n• For 74HCT573-Q100: TTL level\n\n• Inputs and outputs on opposite sides of package allowing easy interface with micr;

Octal D-type transparent latch; 3-state

Octal D-type transparent latch; 3-state

1. General description The 74HC573-Q100; 74HCT573-Q100 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC LATCH OCTAL D 3STATE 20SOIC 集成电路（IC） 锁存器

封装/外壳：20-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC OCTAL D TRANSP LATCH 20SSOP 集成电路（IC） 锁存器

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. These latches appear tran

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. These latches appear tran

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High−Performance Silicon−Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. These latches appear tran

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. These latches appear tran

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs

Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. These latches appear tran