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TC358749XBG.中文资料

厂家型号

TC358749XBG.

文件大小

473.66Kbytes

页面数量

18

功能描述

CMOS Digital Integrated Circuit Silicon Monolithic

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TOSHIBA

TC358749XBG.数据手册规格书PDF详情

Features

● HDMI-RX Interface

 HDMI® 1.4b

- Video Formats Support (Up to 1080P @60fps)

 RGB, YCbCr444: 24-bpp @60fps

 YCbCr422 24-bpp @60fps

- Audio Supports

 Internal Audio PLL to track N/CTS value

transmitted by the ACR packet.

- 3D Support

- HDCP1.3 Support (optional)

- EDID Support

 Release A, Revision 1 (Feb 9, 2000)

 First 128 byte (EDID 1.3 structure)

 First E-EDID Extension: 128 bytes of CEA

Extension version 3 (specified in CEA-861-D)

 Embedded 1 K-byte SRAM (EDID_SRAM)

- Maximum HDMI® clock speed: 165 MHz

 Does not support Audio Return Path and HDMI®

Ethernet Channels

● DSI TX Interface

 MIPI DSI compliant (Version 1.1 22 November

2011)

 Supports up to 4 data lanes @1Gbps/lane

 Supports video data formats

- RGB888 or RGB666

● I2C Slave Interface

 Support for normal (100 kHz), fast mode (400

kHz) and ultra-fast mode (2 MHz)

 Configure all TC358779XBG internal registers

 Support 2 I2C Slave Addresses (7’h0F & 7’h1F)

selected through boot-strap pin (INT)

● Audio Output Interface

Any of the three audio interfaces are available: I2S,

TDM or IEC60958 (pins are multiplexed)

 I2S Audio Interface

- Up to 4 data lanes for 8-channel data

- Support Master Clock mode only

- Support 16, 18, 20 or 24-bit data (depend on

HDMI® input stream)

- Support Left or Right-justify with MSB first

- Support 32 bit-wide time-slot only

- Output Audio Over Sampling clock (256fs)

- Support IEC 60958 & 61937 formats

(depending upon HDMI® input stream) over I2S

- Supports HBR audio stream split across 4 I2S

lines if bandwidth higher than 12 MHz

 TDM (Time Division Multiplexed) Audio Interface

- Fixed to 8 channels

- Support Master Clock mode only

- Support 16, 18, 20 or 24-bit PCM audio data

word (depend on HDMI® input stream)

- Support 32 bit-wide time slot only

- Output Audio OverSampling clock (256fs)

 Digital Audio Interface

- Supports 2 channels (any 2 of the total 8)

(depend on HDMI® input stream)

- Support IEC 60958 & 61937 formats

(depending upon HDMI® input stream)

● Video Processing

 Input formats accepted:

- RGB or YCbCr422

- Interlaced or Progressive

- 2D or 3D

- Limited to 165 MHz PClk, 640×480, 720×480,

720×576, 1280×720 or 1920×1080 are

expected when scalar is used

 Output formats supported:

- RGB888 or RGB666

- Interlaced (in case of no video processing) or

Progressive

- 2D or 3D

- Limited by 4Gbps D-PHY bandwidth, 720×480,

1280×720 or 1920×1080 are expected when

scalar is invoked

 Scaling:

- Hardware performs scaling automatically based

on input and output frame size

 HDMI Rx received input frame size and Panel

size programmed in registers

 Can be overwritten by Software if necessary

- Horizontal Scaling factors supported:

 3-to-2, 1-to-2, 3-to-4, 3-to-8, 9-to-4 and 9-to-16

 2-to-3 and 1-to-3

- Vertical Scaling factors supported:

 1-to-2, 3-to-2 and 3-to-4

 2-to-1 and 3-to-1

 2-to-3 and 4-to-9

 4-to-5 and 8-to-15

- Special handling of 3D formats FP, SBS & T&B

to avoid boundary artifacts.

 Color Space Conversion

- RGB  YCbCr

- Two sets of coefficients provided – 1 set for

each direction

- Both color space convertors can be

enabled/disabled independent of each other.

● InfraRed (IR)

 Support NEC InfraRed protocol.

● System

 Internal core has two power domains (VDDC1

and VDDC2)

- VDDC1 is “always-on” power domain

- VDDC2 can be shut-off during deep sleep mode

● Power supply inputs

 Core and MIPI D-PHY: 1.2 V

 I/O: 1.8 V – 3.3 V

 HDMI®: 3.3 V

 VPLL: 1.2 V

更新时间:2025-11-30 9:30:00
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