位置:V62SLASH24601-02XE > V62SLASH24601-02XE详情

V62SLASH24601-02XE中文资料

厂家型号

V62SLASH24601-02XE

文件大小

3949.44Kbytes

页面数量

73

功能描述

ADC3664-SEP ADC3664-EP 14-Bit, 125MSPS, Low Noise, Low Power Dual Channel ADC

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

V62SLASH24601-02XE数据手册规格书PDF详情

1 Features

• Radiation tolerant (-SEP only):

– Single-event latch-up (SEL) immune up to LET

= 43 MeV-cm2/mg

– Single-event functional interrupt (SEFI)

characterized up to LET = 43 MeV-cm2/mg

– Total ionizing dose (TID): 30krad(Si)

• Enhanced product (-EP and -SEP):

– Meets ASTM E595 outgassing specification

– Vendor item drawing (VID)

– Temperature range: –55°C to 105°C

– One fabrication, assembly, and test site

– Gold bond wire, NiPdAu lead finish

– Wafer lot traceability

– Extended product life cycle

• Dual channel, 125MSPS ADC

• 14-bit resolution (no missing codes)

• Noise floor: –156.9dBFS/Hz

• Low power consumption: 100mW/ch (at

125MSPS)

• Latency: 2 clock cycles

• Voltage reference options:

– External: 1 to 125MSPS

– Internal: 100 to 125MSPS

• Input bandwidth: 200MHz (3dB)

• INL: ±2.6 LSB; DNL: ±0.9 LSB (typical)

• On-chip DSP (optional/bypassable)

– Decimation by 2, 4, 8, 16, 32

– 32-bit NCO

• Serial LVDS digital interface (2-, 1- and 1/2-wire)

• Small Footprint: 40 QFN (5 × 5mm) package

• Spectral performance (fIN = 5MHz):

– SNR: 77.5dBFS

– SFDR: 84dBc HD2, HD3

– SFDR: 92dBFS worst spur

2 Applications

• High-speed data acquisition

• Satellite optical communications payloads

• Satellite imaging payloads

• Satellite communication payloads

• Satellite RADAR and LIDAR payloads

3 Description

The ADC3664-xEP device is a low-noise, ultra-low

power, 14-bit, 125MSPS, high-speed dual channel

ADC. Designed for lowest noise performance,

the device delivers a noise spectral density of

-156.9dBFS/Hz combined with linearity and dynamic

range. The ADC3664-xEP offers IF sampling support

which makes the device designed for a wide range

of applications. High-speed control loops benefit from

the short latency as low as one clock cycle. The

ADC consumes only 100mW/ch at 125MSPS, and the

power consumption scales well with lower sampling

rates.

The ADC3664-xEP uses a serial LVDS (SLVDS)

interface to output the data which minimizes the

number of digital interconnects. The device supports

a two-lane, one-lane and half-lane option. The device

supports an extended temperature range from –55°C

to +105°C.

更新时间:2025-12-5 17:02:00
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