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SN74ALVCH16270DLR中文资料

厂家型号

SN74ALVCH16270DLR

文件大小

275.06Kbytes

页面数量

15

功能描述

12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

通用总线函数 12-24bit Reg Bus

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74ALVCH16270DLR数据手册规格书PDF详情

FEATURES

· Member of the Texas Instruments Widebus™

Family

· EPIC™ (Enhanced-Performance Implanted

CMOS) Submicron Process

· Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

· ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

· Latch-Up Performance Exceeds 250 mA Per

JESD 17

· Package Options Include Plastic Shrink

Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages

DESCRIPTION

This 12-bit to 24-bit registered bus exchanger is

designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16270 is used in applications in

which data must be transferred from a narrow

high-speed bus to a wide lower-frequency bus.

The device provides synchronous data exchange

between the two ports. Data is stored in the internal

registers on the low-to-high transition of the clock

(CLK) input when the appropriate CLKEN inputs are

low. The select (SEL) line selects 1B or 2B data for

the A outputs. For data transfer in the A-to-B

direction, a two-stage pipeline is provided in the

A-to-1B path, with a single storage register in the

A-to-2B path. Proper control of the CLKENA inputs

allows two sequential 12-bit words to be presented

synchronously as a 24-bit word on the B port. Data

flow is controlled by the active-low output enables

(OEA, OEB). The control terminals are registered to

synchronize the bus-direction changes with CLK.

To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as

possible, and OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined

by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the

outputs cannot be determined prior to the arrival of the first clock pulse.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16270 is characterized for operation from -40°C to 85°C.

SN74ALVCH16270DLR产品属性

  • 类型

    描述

  • 型号

    SN74ALVCH16270DLR

  • 功能描述

    通用总线函数 12-24bit Reg Bus

  • RoHS

  • 制造商

    Texas Instruments

  • 逻辑类型

    CMOS

  • 逻辑系列

    74VMEH

  • 电路数量

    1

  • 传播延迟时间

    10.1 ns

  • 电源电压-最大

    3.45 V

  • 电源电压-最小

    3.15 V

  • 最大工作温度

    + 85 C

  • 最小工作温度

    0 C

  • 封装/箱体

    TSSOP-48

  • 封装

    Reel

更新时间:2025-10-8 23:00:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
SSOP56300mil
1612
只做原装,提供一站式配单服务,代工代料。BOM配单
TI
24+
SSOP56
3400
TI
2016+
SSOP
3000
本公司只做原装,假一罚十,可开17%增值税发票!
TI
25+
SSOP56
4690
百分百原装正品 真实公司现货库存 本公司只做原装 可
TI
23+
SSOP
10500
全新原装现货,假一赔十
Texas Instruments
24+
56-SSOP
65300
一级代理/放心采购
TI
25+
SSOP-56
3854
就找我吧!--邀您体验愉快问购元件!
TI/德州仪器
23+
SSOP56
50000
全新原装正品现货,支持订货
TI
22+
56SSOP
9000
原厂渠道,现货配单
TI
25+
SSOP56
4500
全新原装、诚信经营、公司现货销售!

SN74ALVCH16270DLR 价格

参考价格:¥6.1195

型号:SN74ALVCH16270DLR 品牌:TI 备注:这里有SN74ALVCH16270DLR多少钱,2025年最近7天走势,今日出价,今日竞价,SN74ALVCH16270DLR批发/采购报价,SN74ALVCH16270DLR行情走势销售排排榜,SN74ALVCH16270DLR报价。