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SN74ALVCH16270DL中文资料
SN74ALVCH16270DL数据手册规格书PDF详情
FEATURES
· Member of the Texas Instruments Widebus™
Family
· EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process
· Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
· ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
· Latch-Up Performance Exceeds 250 mA Per
JESD 17
· Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
DESCRIPTION
This 12-bit to 24-bit registered bus exchanger is
designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16270 is used in applications in
which data must be transferred from a narrow
high-speed bus to a wide lower-frequency bus.
The device provides synchronous data exchange
between the two ports. Data is stored in the internal
registers on the low-to-high transition of the clock
(CLK) input when the appropriate CLKEN inputs are
low. The select (SEL) line selects 1B or 2B data for
the A outputs. For data transfer in the A-to-B
direction, a two-stage pipeline is provided in the
A-to-1B path, with a single storage register in the
A-to-2B path. Proper control of the CLKENA inputs
allows two sequential 12-bit words to be presented
synchronously as a 24-bit word on the B port. Data
flow is controlled by the active-low output enables
(OEA, OEB). The control terminals are registered to
synchronize the bus-direction changes with CLK.
To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as
possible, and OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined
by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the
outputs cannot be determined prior to the arrival of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16270 is characterized for operation from -40°C to 85°C.
SN74ALVCH16270DL产品属性
- 类型
描述
- 型号
SN74ALVCH16270DL
- 功能描述
通用总线函数 12-24bit Reg Bus
- RoHS
否
- 制造商
Texas Instruments
- 逻辑类型
CMOS
- 逻辑系列
74VMEH
- 电路数量
1
- 传播延迟时间
10.1 ns
- 电源电压-最大
3.45 V
- 电源电压-最小
3.15 V
- 最大工作温度
+ 85 C
- 最小工作温度
0 C
- 封装/箱体
TSSOP-48
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI(德州仪器) |
24+ |
SSOP56300mil |
1612 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI |
24+ |
SSOP56 |
26200 |
原装现货,诚信经营! |
|||
24+ |
3000 |
自己现货 |
|||||
Texas Instruments |
24+ |
56-SSOP |
65300 |
一级代理/放心采购 |
|||
TI |
25+ |
SSOP-56 |
4854 |
就找我吧!--邀您体验愉快问购元件! |
|||
TI |
22+ |
56SSOP |
9000 |
原厂渠道,现货配单 |
|||
TI(德州仪器) |
23+ |
SSOP-56 |
9990 |
原装正品,支持实单 |
|||
TI |
23+ |
47817 |
公司原装现货!主营品牌!可含税欢迎查询 |
||||
TI |
2023+ |
SSOP56 |
3000 |
进口原装现货 |
|||
TI(德州仪器) |
24+ |
SSOP56300mil |
1490 |
原装现货,免费供样,技术支持,原厂对接 |
SN74ALVCH16270DLR 价格
参考价格:¥6.1195
SN74ALVCH16270DL 资料下载更多...
SN74ALVCH16270DL相关电子新闻
SN74ALVCH16270DL
安装类型 表面贴装型 封装/外壳 56-BSSOP(0.295,7.50mm 宽) 工作温度 -40°C ~ 85°C 供应商器件封装 56-SSOP 逻辑类型 寄存总线交换器 电流-输出高、低 24mA,24mA 电压-供电 1.65V ~ 3.6V 电路数 12 至 24 位
2021-7-13
SN74ALVCH16270DL 芯片相关型号
- LTM4650EY-2#PBF
- LTM4650IY-2
- LTM4650IY-2#PBF
- R8011KNZ4
- SN74ALVC7806-25DL
- SN74ALVC7806-25DL.A
- SN74ALVC7806-40DL
- SN74ALVC7806-40DL.A
- SN74ALVC7814-40DL
- SN74ALVC7814-40DL.A
- SN74ALVCH16270DL.B
- SN74ALVCH16270DLR
- SN74ALVCH16270DLR.B
- SN74ALVCH16334DL
- SN74ALVCH16334DL.B
- SN74ALVCH16524DL
- SN74ALVCH16524DL.B
- SN74ALVCH16903DL
- SN74ALVCH16903DL.B
- SN74LVT16646DGGR
- SN74LVT16646DL
- SN74LVT16646DL.B
- SN74LVT16646DLR
- SN74LVU04A
- SN74LVU04A-Q1
- SN74LVU04AQPWRG4Q1
- SN74LVU04AQPWRG4Q1.A
- UA9639CP
- UA9639CP.A
- V62SLASH04694-01XE
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