位置:SN74ACT7813-15DL.A > SN74ACT7813-15DL.A详情
SN74ACT7813-15DL.A中文资料
SN74ACT7813-15DL.A数据手册规格书PDF详情
Member of the Texas Instruments
WidebusE Family
Free-Running Read and Write Clocks Can
Be Asynchronous or Coincident
Read and Write Operations Synchronized
to Independent System Clocks
Input-Ready Flag Synchronized to Write
Clock
Output-Ready Flag Synchronized to Read
Clock
64 Words by 18 Bits
Low-Power Advanced CMOS Technology
Half-Full Flag and Programmable
Almost-Full/Almost-Empty Flag
Bidirectional Configuration and Width
Expansion Without Additional Logic
Fast Access Times of 12 ns With a 50-pF
Load and All Data Outputs Switching
Simultaneously
Data Rates up to 67 MHz
Pin-to-Pin Compatible With SN74ACT7803
and SN74ACT7805
Packaged in Shrink Small-Outline 300-mil
Package Using 25-mil Center-to-Center
Spacing
description
The SN74ACT7813 is a 64-word × 18-bit FIFO
suited for buffering asynchronous datapaths up to
67-MHz clock rates and 12-ns access times. Two
devices can be configured for bidirectional data buffering without additional logic. Multiple distributed VCC and
GND pins, along with Texas Instruments patented output edge control (OECE) circuit, dampen simultaneous
switching noise.
The write clock (WRTCLK) and read clock (RDCLK) are free running and can be asynchronous or coincident.
Data is written to memory on the rising edge of WRTCLK when WRTEN1 is high, WRTEN2 is low, and input
ready (IR) is high. Data is read from memory on the rising edge of RDCLK when RDEN, OE1, and OE2 are low
and output ready (OR) is high. The first word written to memory is clocked through to the output buffer regardless
of the RDEN, OE1, and OE2 levels. The OR flag indicates that valid data is present on the output buffer.
The FIFO can be reset asynchronously to WRTCLK and RDCLK. RESET must be asserted while at least four
WRTCLK and four RDCLK rising edges occur to clear the synchronizing registers. Resetting the FIFO initializes
the IR, OR, and half-full (HF) flags low and the almost-full/almost-empty (AF/AE) flag high. The FIFO must be
reset upon power up.
The SN74ACT7813 is characterized for operation from 0°C to 70°C.
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
22+ |
56SSOP |
9000 |
原厂渠道,现货配单 |
|||
TI |
24+ |
5000 |
自己现货 |
||||
TexasInstruments |
18+ |
ICCLOCKEDFIFOMEMORY56-SS |
6800 |
公司原装现货/欢迎来电咨询! |
|||
Texas Instruments |
24+ |
56-SSOP |
53200 |
一级代理/放心采购 |
|||
TI |
25+ |
SSOP-56 |
1001 |
就找我吧!--邀您体验愉快问购元件! |
|||
Texas Instruments(德州仪器) |
24+ |
56-BSSOP (0.295, 7.50mm Width |
690000 |
代理渠道/支持实单/只做原装 |
|||
TI |
2025+ |
SSOP-56 |
16000 |
原装优势绝对有货 |
|||
Rochester |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
TI |
24+ |
SSOP56 |
5000 |
只做原装公司现货 |
|||
TI |
23+ |
SSOP56 |
8650 |
受权代理!全新原装现货特价热卖! |
SN74ACT7813-15DL.A 资料下载更多...
SN74ACT7813-15DL.A 芯片相关型号
- BMB-1E-0030A-N2
- BMB-1E-0120A-N2
- BMB-1E-0300A-N2
- BMB-1E-0470A-N2
- BMB-1E-0600A-N2
- BMB-1J-0030A-N2
- BMB-1J-0040A-N2
- BMB-1J-0060A-N2
- BMB2A0120AN4.
- BMB2A0220AN4.
- FKP2
- FKP2C001501D00ESSD
- FKP2C001501D00FSSD
- FKP2C001501D00GSSD
- FKP2C001501D00HSSD
- FKP2C001501D00JSSD
- FKP2C001501D00KSSD
- FKP2C002201D00ESSD
- FKP2C002201D00FSSD
- FKP2C002201D00GSSD
- FKP2C002201D00HSSD
- FKP2C002201D00JSSD
- FKP2C002201D00KSSD
- FKP2C003301D00ESSD
- FKP2C003301D00FSSD
- PM-17-24VDC
- PM-17-550VAC
- PM-17-550VDC
- SN74ACT7813
- SN74ACT7813-15DL
Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105