1 Features

• LP-HCSL clock MUX that support:

– PCIe Gen 1 to Gen 7

– CC (Common Clock) and IR (Independent

Reference) PCIe architectures

– Input clock with or without SSC

• DB2000QL compliant:

– All devices meet DB2000QL specifications

• Extremely low additive jitter:

– 31fs maximum 12kHz to 20MHz RMS additive

jitter at 156.25MHz

– 13fs maximum additive jitter for PCIe Gen 4

– 5fs maximum additive jitter for PCIe Gen 5

– 3fs maximum additive jitter for PCIe Gen 6

– 2.1fs maximum additive jitter for PCIe Gen 7

• Fail-safe input

• Flexible power-up sequence

• Automatic output disable

• Individual output enable

• SBI (Side Band Interface) for high-speed output

enable or disable

• LOS (Loss of Signal) input detection

• 85Ω or 100Ω output impedance

• 1.8V / 3.3V ± 10% power supply

• –40°C to 105°C ambient temperature

2 Applications

• High Performance Computing

• Server Motherboard

• NIC/SmartNIC

• Hardware Accelerator

3 Description

The LMKDB devices are a family of extremely-lowjitter

LP-HCSL clock muxes that support PCIe Gen 1

to Gen 7 and are DB2000QL compliant. The devices

provide flexible power-up sequence, fail-safe inputs,

individual output enable and disable pins, loss of input

signal (LOS) detection and automatic output disable

features, as well as excellent power supply noise

rejection performance.

Both 1.8V and 3.3V power supply voltages are

supported.