1 Features

• LP-HCSL clock buffer and clock MUX that support:

– PCIe Gen 1 to Gen 7

– CC (Common Clock) and IR (Independent Reference) PCIe architectures

– Input clock with or without SSC

• Intel DB2000QL and DB1206 compliant:

– All devices meet DB2000QL specifications

– LMKDB1120 is pin-compatible to DB2000QL

– LMKDB1112 is pin-compatible to DB1206

• Extremely low additive jitter:

– 31fs maximum 12kHz to 20MHz RMS additive jitter at 156.25MHz

– 13fs maximum additive jitter for PCIe Gen 4

– 5fs maximum additive jitter for PCIe Gen 5

– 3fs maximum additive jitter for PCIe Gen 6

– 2.1fs maximum additive jitter for PCIe Gen 7

• Fail-safe input

• Fail-safe outputs (LMKDB1120FS, LMKDB1108FS and LMKDB1104FS only)

• Flexible power-up sequence

• Automatic output disable

• Individual output enable

• SBI (Side Band Interface) for high-speed output enable or disable

• LOS (Loss of Signal) input detection

• 85Ω or 100Ω output impedance

• 1.8V / 3.3V ± 10% power supply

• –40°C to 105°C ambient temperature