位置:CD74HC192E > CD74HC192E详情

CD74HC192E中文资料

厂家型号

CD74HC192E

文件大小

759.25Kbytes

页面数量

27

功能描述

High-Speed CMOS Logic Presettable Synchronous 4-Bit Up/Down Counters

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

CD74HC192E数据手册规格书PDF详情

Features

• Synchronous Counting and Asynchronous

Loading

• Two Outputs for N-Bit Cascading

• Look-Ahead Carry for High-Speed Counting

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Significant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH

Description

The ’HC192, ’HC193 and ’HCT193 are asynchronously

presettable BCD Decade and Binary Up/Down synchronous

counters, respectively.

Presetting the counter to the number on the preset data inputs

(P0-P3) is accomplished by a LOW asynchronous parallel

load input (PL). The counter is incremented on the low-to-high

transition of the Clock-Up input (and a high level on the Clock-

Down input) and decremented on the low to high transition of

the Clock-Down input (and a high level on the Clock-up input).

A high level on the MR input overrides any other input to clear

the counter to its zero state. The Terminal Count up (carry)

goes low half a clock period before the zero count is reached

and returns to a high level at the zero count. The Terminal

Count Down (borrow) in the count down mode likewise goes

low half a clock period before the maximum count (9 in the

192 and 15 in the 193) and returns to high at the maximum

count. Cascading is effected by connecting the carry and

borrow outputs of a less significant counter to the Clock-Up

and Clock-Down inputs, respectively, of the next most

significant counter.

If a decade counter is preset to an illegal state or assumes an

illegal state when power is applied, it will return to the normal

sequence in one count as shown in state diagram.

更新时间:2025-10-4 15:09:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
23+
16-DIP
15000
TI现货商!原装正品!
TI
DIP
1052
原装现货 样品免费送 期待您的来电咨询
HAR
24+
DIP16
125
TI
25+
DIP
10024
百分百原装正品 真实公司现货库存 本公司只做原装 可
RCA
24
全新原装 货期两周
TI
23+
DIP16
8650
受权代理!全新原装现货特价热卖!
TI
25+23+
24095
绝对原装正品全新进口深圳现货
TI/德州仪器
23+
DIP16
30000
原装现货,假一赔十.
TI
21+
DIP
10000
原装,品质保证,请来电咨询
TI
23+
DIP16
50000
全新原装正品现货,支持订货

CD74HC192EE4 价格

参考价格:¥1.6372

型号:CD74HC192EE4 品牌:Texas 备注:这里有CD74HC192E多少钱,2025年最近7天走势,今日出价,今日竞价,CD74HC192E批发/采购报价,CD74HC192E行情走势销售排排榜,CD74HC192E报价。