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CD74HC192中文资料
CD74HC192数据手册规格书PDF详情
Features
• Synchronous Counting and Asynchronous
Loading
• Two Outputs for N-Bit Cascading
• Look-Ahead Carry for High-Speed Counting
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1μA at VOL, VOH
Description
The ’HC192, ’HC193 and ’HCT193 are asynchronously
presettable BCD Decade and Binary Up/Down synchronous
counters, respectively.
Presetting the counter to the number on the preset data inputs
(P0-P3) is accomplished by a LOW asynchronous parallel
load input (PL). The counter is incremented on the low-to-high
transition of the Clock-Up input (and a high level on the Clock-
Down input) and decremented on the low to high transition of
the Clock-Down input (and a high level on the Clock-up input).
A high level on the MR input overrides any other input to clear
the counter to its zero state. The Terminal Count up (carry)
goes low half a clock period before the zero count is reached
and returns to a high level at the zero count. The Terminal
Count Down (borrow) in the count down mode likewise goes
low half a clock period before the maximum count (9 in the
192 and 15 in the 193) and returns to high at the maximum
count. Cascading is effected by connecting the carry and
borrow outputs of a less significant counter to the Clock-Up
and Clock-Down inputs, respectively, of the next most
significant counter.
If a decade counter is preset to an illegal state or assumes an
illegal state when power is applied, it will return to the normal
sequence in one count as shown in state diagram.
CD74HC192产品属性
- 类型
描述
- 型号
CD74HC192
- 功能描述
计数器移位寄存器 Hi-Sp CMOS Pre Sync Up/Dwn w/ASync Reset
- RoHS
否
- 制造商
Texas Instruments
- 计数顺序
Serial to Serial/Parallel
- 电路数量
1
- 封装/箱体
SOIC-20 Wide
- 输入线路数量
1
- 输出类型
Open Drain
- 传播延迟时间
650 ns
- 最大工作温度
+ 125 C
- 最小工作温度
- 40 C
- 封装
Reel
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
TI |
23+ |
16-TSSOP |
15000 |
TI现货商!原装正品! |
|||
TI(德州仪器) |
24+ |
TSSOP16 |
2317 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
TI |
24+ |
PDIP|16 |
798400 |
免费送样原盒原包现货一手渠道联系 |
|||
TI |
DIP |
1052 |
原装现货 样品免费送 期待您的来电咨询 |
||||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
TI |
25+ |
DIP |
10024 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
TI |
24+ |
1250 |
|||||
RCA |
新 |
24 |
全新原装 货期两周 |
||||
TI |
23+ |
DIP16 |
8650 |
受权代理!全新原装现货特价热卖! |
|||
TI |
25+23+ |
24095 |
绝对原装正品全新进口深圳现货 |
CD74HC192PWR 价格
参考价格:¥1.3170
CD74HC192 资料下载更多...
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Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105