SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC13 implements the smart time division multiplexed serial port (SMARTDM). This design innovation optimizes the DSP performance with an advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontrollers. The S

Low Power CMOS, 16-Bit, 26-KSPS Codec With Smart Time Division Multiplexed (SMARTDM™) Serial Port

1.1 Description The TLV320AIC14 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

SMARTDM™ Low-Power, Low-Voltage, 1.1-V to 3.6-V 1/0, 16-Bit, 26-KSPS Codec

1.1 Description The TLV320AIC15 implements the smart time division multiplexed serial port (SMARTDM). This is TI’s design innovation to optimize DSP performance with its most advanced synchronous serial port in TDM format for glue-free interface to popular DSPs (i.e., C5x, C6x) and microcontro

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

低功耗立体声语音频带编解码器

The TLV320AIC2x is a low-cost, low-power, highly-integrated, high-performance, dual-voice codec. It features two 16-bit analog-to-digital (A/D) channels and two 16-bit digital-to-analog (D/A) channels, which can be connected to a handset, headset, speaker, microphone, or a subscriber line via a prog • Stereo 16-Bit Oversampling Sigma-Delta A/D Converter\n• Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock\n• Programmable Sampling Rate up to: \n• Max 104 Ksps With IIR/FIR Bypassed\n• On-Chip FIR Produced 84-dB SNR for ADC and 92-dB SNR for DAC over 1;

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

文件：1.61033 Mbytes Page：56 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

PRODUCT NOTIFICATION

文件：330.63 Kbytes Page：50 Pages

丝印代码：320AIC20C；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20C；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20I；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

具有 8Ω 扬声器放大器的低功耗立体声语音频带编解码器

The TLV320AIC2x is a low-cost, low-power, highly-integrated, high-performance, dual-voice codec. It features two 16-bit analog-to-digital (A/D) channels and two 16-bit digital-to-analog (D/A) channels, which can be connected to a handset, headset, speaker, microphone, or a subscriber line via a prog • Stereo 16-Bit Oversampling Sigma-Delta A/D Converter\n• Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock\n• Programmable Sampling Rate up to: \n• Max 104 Ksps With IIR/FIR Bypassed\n• On-Chip FIR Produced 84-dB SNR for ADC and 92-dB SNR for DAC over 1;

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

丝印代码：320AIC20K；Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

FEATURES · Stereo 16-Bit Oversampling Sigma-Delta A/D Converter · Stereo 16-Bit Oversampling Sigma-Delta D/A Converter · Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock · Selectable FIR/IIR Filter With Bypassing Option · Programmable Sampli

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

封装/外壳：48-TQFP 包装：托盘 描述：IC CODEC 16BIT DUAL PROG 48-TQFP 集成电路（IC） 编解码器

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

封装/外壳：48-TQFP 包装：托盘 描述：IC CODEC 16BIT DUAL PROG 48-TQFP 集成电路（IC） 编解码器

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

LOW-POWER, HIGHLY-INTEGRATED, PROGRAMMABLE 16-Bit, 26-KSPS MONO CODEC

文件：1.15972 Mbytes Page：63 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

文件：1.61033 Mbytes Page：56 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages

Low-Power, Highly-Integrated, Programmable 16-Bit, 26-KSPS, Dual-Channel CODEC

文件：1.61033 Mbytes Page：56 Pages

Layout and Grounding Guidelines for TLV320AIC2x

文件：983.6 Kbytes Page：53 Pages