TCA9511A Hot Swappable I2C Bus and SMBus Buffer

1 Features • Supports bidirectional data transfer of I2C bus signals • Operating power-supply voltage range of 2.3 V to 5.5 V • TA ambient air temperature range of -40 °C to 125 °C • 1-V Precharge on all SDA and SCL lines prevents corruption during live insertion • Accommodates standard m

2 位双向 2.3V 至 5.5V 热插拔 400kHz I2C/SMBus 缓冲器

TCA9511A Hot Swappable I2C Bus and SMBus Buffer

文件：472.42 Kbytes Page：25 Pages

TCA9511A Hot Swappable I2C Bus and SMBus Buffer

1 Features • Supports bidirectional data transfer of I2C bus signals • Operating power-supply voltage range of 2.3 V to 5.5 V • TA ambient air temperature range of -40 °C to 125 °C • 1-V Precharge on all SDA and SCL lines prevents corruption during live insertion • Accommodates standard m

TCA9511A Hot Swappable I2C Bus and SMBus Buffer

1 Features • Supports bidirectional data transfer of I2C bus signals • Operating power-supply voltage range of 2.3 V to 5.5 V • TA ambient air temperature range of -40 °C to 125 °C • 1-V Precharge on all SDA and SCL lines prevents corruption during live insertion • Accommodates standard m

TCA9511A Hot Swappable I2C Bus and SMBus Buffer

文件：472.42 Kbytes Page：25 Pages

封装/外壳：8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：TCA9511A 集成电路（IC） 信号缓冲器、中继器、分离器

功能：I²C 总线缓冲 包装：散装 描述：TL16C750EEVM 开发板，套件，编程器 评估和演示板及套件

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs

GENERAL DESCRIPTION The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core. The design emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from this

MACHINE SCREW PAN PHILLIPS 10-32

文件：130.87 Kbytes Page：1 Pages