4-Bit D Type Latch

4-Bit D Type Latch The TC74HC375A is a high speed CMOS D-TYPE LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It contains two groups of 2-bit latches controlled by an enable i

74HC CMOS logic IC series

4-Bit D Type Latch

4-Bit D Type Latch The TC74HC375A is a high speed CMOS D-TYPE LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It contains two groups of 2-bit latches controlled by an enable i

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data inp

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data inp

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data inp

Quad. Bistable Latches

Description This latch is ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data inp