3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

3.3V, DUAL DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR

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5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

Dual Differential PECL to CMOS/TTL Translator

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for application

Dual Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the transla

Dual Differential PECL to CMOS/TTL Translator

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