5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

5V Dual Differential PECL to TTL Translator (Preliminary)

General Description The 100ELT23 is a dual differential PECL to TTL translator operating from a single +5V supply. The dual gate design of the 100ELT23 makes it ideal for applications which require the translation of a clock and a data signal. The 100 series is temperature compensated. Feature

5V Dual Differential PECL to TTL Translator (Preliminary)

Dual Differential PECL to TTL Translator

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data s

3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl