Automotive-grade N-channel 60 V, 0.022 Ω typ., 35 A STripFET™ II Power MOSFET in a DPAK package

Features  AEC-Q101 qualified  Low threshold drive  Gate charge minimized Description This Power MOSFET series realized with STMicroelectronics unique STripFET™ process is specifically designed to minimize input capacitance and gate charge. It is therefore ideal as a primary switch in

封装/外壳：TO-252-3，DPak（2 引线 + 接片），SC-63 包装：卷带（TR） 描述：MOSFET N-CH 60V 28A DPAK 分立半导体产品 晶体管 - FET，MOSFET - 单个

N-CHANNEL 60V - 0.020 ohm - 28A IPAK/DPAK STripFET??II POWER MOSFET

DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique Single Feature Size™ stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkab

60V N-Channel Enhancement Mode Power MOSFET

General Description The STD30NF06 uses advanced trench technology and design to provide excellent RDS(ON) with low gate charge. It can be used in a wide variety of applications. Features VDS = 60V,ID =30A RDS(ON),23mΩ(Typ) @ VGS =10V RDS(ON),29mΩ(Typ) @ VGS =4.5V Advanced Trench Technolo

60V N-Channel Enhancement Mode Power MOSFET

General Description The STD30NF06 uses advanced trench technology and design to provide excellent RDS(ON) with low gate charge. It can be used in a wide variety of applications. Features VDS = 60V,ID =30A RDS(ON),23mΩ(Typ) @ VGS =10V RDS(ON),29mΩ(Typ) @ VGS =4.5V Advanced Trench Technology

60V N-Channel Enhancement Mode Power MOSFET

General Description The STD30NF06 uses advanced trench technology and design to provide excellent RDS(ON) with low gate charge. It can be used in a wide variety of applications. Features VDS = 60V,ID =30A RDS(ON),23mΩ(Typ) @ VGS =10V RDS(ON),29mΩ(Typ) @ VGS =4.5V Advanced Trench Technology

N-CHANNEL 60V - 0.022ohm - 35A DPAK/IPAK STripFET??POWER MOSFET

DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remar