位置：首页 > IC中文资料第2100页 > SSTUB32866CHLFT
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SSTUB32866CHLFT | 封装/外壳：96-LFBGA 包装：托盘 描述：IC REGIST BUFF 25BIT DDR2 96-BGA 集成电路（IC） 专用逻辑器件 | ETC 知名厂家 | ETC |   |
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Description This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8-V CMOS drivers that have been optimized to drive | IDT | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Features • 25-bit 1:1 or 14-bit 1:2 registered buffer with parity check functionality • Supports SSTL_18 JEDEC specification on data inputs and outputs • Supports LVCMOS switching levels on C0, C1, and RESET inputs • Low voltage operation: VDD = 1.7V to 1.9V • Drop-in replacement for ICSSS | RENESAS 瑞萨 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Features • 25-bit 1:1 or 14-bit 1:2 registered buffer with parity check functionality • Supports SSTL_18 JEDEC specification on data inputs and outputs • Supports LVCMOS switching levels on C0, C1, and RESET inputs • Low voltage operation: VDD = 1.7V to 1.9V • Drop-in replacement for ICSSS | RENESAS 瑞萨 | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Description This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8-V CMOS drivers that have been optimized to drive | IDT | | ||
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Description This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8-V CMOS drivers that have been optimized to drive | IDT | |
SSTUB32866CHLFT产品属性
- 类型
描述
- 型号
SSTUB32866CHLFT
- 功能描述
IC REGIST BUFF 25BIT DDR2 96-BGA
- RoHS
是
- 类别
集成电路(IC) >> 逻辑 - 专用逻辑
- 系列
-
- 产品变化通告
Product Discontinuation 25/Apr/2012
- 标准包装
1,500
- 系列
74SSTV
- 逻辑类型
DDR 的寄存缓冲器
- 电源电压
2.3 V ~ 2.7 V
- 位数
14
- 工作温度
0°C ~ 70°C
- 安装类型
表面贴装
- 封装/外壳
48-TFSOP（0.240，6.10mm 宽）
- 供应商设备封装
48-TSSOP
- 包装
带卷(TR)
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
PHI |
24+ |
NA/ |
2700 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
PHI |
23+ |
BGA |
11200 |
原厂授权一级代理、全球订货优势渠道、可提供一站式BO |
|||
恩XP |
25+ |
SOT536 |
188600 |
全新原厂原装正品现货 欢迎咨询 |
|||
PHI |
2023+ |
BGA |
2700 |
专注全新正品,优势现货供应 |
|||
IDT |
22+ |
96CABGA (13.5x5.5) |
9000 |
原厂渠道,现货配单 |
|||
PHI |
2023+ |
BGA |
8800 |
正品渠道现货 终端可提供BOM表配单。 |
|||
恩XP |
25+ |
3000 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
||||
PHI |
23+ |
BGA |
2700 |
全新原装正品现货,支持订货 |
|||
PHI |
23+ |
BGA |
50000 |
全新原装正品现货,支持订货 |
|||
Renesas |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
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SSTUB32866CHLFT规格书下载地址
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2012-11-8
DdatasheetPDF页码索引
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