3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS ‘WITH 3-STATE OUTPUTS

Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce)

封装/外壳：24-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 3.6V 24SSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：518.86 Kbytes Page：18 Pages

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：518.86 Kbytes Page：18 Pages

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：151.91 Kbytes Page：10 Pages

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：518.86 Kbytes Page：18 Pages

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：518.86 Kbytes Page：18 Pages

Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate

Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate

Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate