Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate

Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate

Low Voltage Octal Transceiver/Register with 3-STATE Outputs

General Description The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC TXRX NON-INVERT 3.6V 24TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC TXRX NON-INVERT 3.6V 24SOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：518.86 Kbytes Page：18 Pages

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：151.91 Kbytes Page：10 Pages