位置：首页 > IC中文资料第742页 > SN74LVTH16500ZQLR
| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74LVTH16500ZQLR | 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments. ‘Widebus ™ Family UBT ™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode ‘Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V Vcc) Support Unregulated Battery Ope | TI2 德州仪器 |   | |
SN74LVTH16500ZQLR | 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments Widebus Family UBT Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation | TI2 德州仪器 | | |
SN74LVTH16500ZQLR | 封装/外壳：56-VFBGA 包装：管件 描述：IC UNIV BUS TXRX 18BIT 56BGA 集成电路（IC） 通用总线功能 | TI2 德州仪器 | | |
SN74LVTH16500ZQLR | 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS 文件：391.55 Kbytes Page：16 Pages | TI 德州仪器 | | |
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS Members of the Texas Instruments. ‘Widebus ™ Family UBT ™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode ‘Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V Vcc) Support Unregulated Battery Ope | TI2 德州仪器 | | ||
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS 文件：135.52 Kbytes Page：9 Pages | TI 德州仪器 | | ||
Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary General Description The LVTH16500 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary General Description The LVTH16500 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary General Description The LVTH16500 is an 18-bit universal bus transceiver combining D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clo | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |
SN74LVTH16500ZQLR产品属性
- 类型
描述
- 型号
SN74LVTH16500ZQLR
- 功能描述
总线收发器 Device w/Octal Buffers
- RoHS
否
- 制造商
Fairchild Semiconductor
- 逻辑类型
CMOS
- 逻辑系列
74VCX
- 每芯片的通道数量
16
- 输入电平
CMOS
- 输出电平
CMOS
- 输出类型
3-State
- 高电平输出电流
- 24 mA
- 低电平输出电流
24 mA
- 传播延迟时间
6.2 ns
- 电源电压-最大
2.7 V, 3.6 V
- 电源电压-最小
1.65 V, 2.3 V
- 最大工作温度
+ 85 C
- 封装/箱体
TSSOP-48
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
25+ |
BGA56 |
4500 |
全新原装、诚信经营、公司现货销售! |
|||
TI |
24+ |
TSSOP |
2987 |
只售原装自家现货!诚信经营!欢迎来电! |
|||
TI |
2016+ |
SSOP |
6528 |
只做进口原装现货!或订货,假一赔十! |
|||
TI/TEXAS |
23+ |
TSSOP |
8931 |
||||
TI |
00+ |
TSSOP |
2273 |
原装现货海量库存欢迎咨询 |
|||
TI/德州仪器 |
24+ |
TSSOP56 |
174 |
只供应原装正品 欢迎询价 |
|||
SN74LVTH16501DGG |
86 |
86 |
|||||
Rochester |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
|||
Texas Instruments |
24+ |
56-BGA MICROSTAR JUNIOR(7.0x4 |
65300 |
一级代理/放心采购 |
|||
TI |
24+ |
TSSOP |
4897 |
绝对原装!现货热卖! |
SN74LVTH16500ZQLR芯片相关品牌
SN74LVTH16500ZQLR规格书下载地址
SN74LVTH16500ZQLR参数引脚图相关
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DdatasheetPDF页码索引
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