丝印代码：C04J；Triple Inverter Gate

1FEATURES 2• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)

TRIPLE INVERTER GATE

文件：318.53 Kbytes Page：12 Pages

Triple Inverter Gate

文件：839.74 Kbytes Page：16 Pages

封装/外壳：8-VFSOP（0.091"，2.30mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC INVERTER 3CH 3-INP 8VSSOP 集成电路（IC） 门和反相器

丝印代码：C04J；Triple Inverter Gate

1FEATURES 2• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)

丝印代码：C04R；Triple Inverter Gate

1FEATURES 2• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)

丝印代码：C04R；Triple Inverter Gate

1FEATURES 2• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Max tpd of 4.1 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.3 V • Typical VOLP (Output Ground Bounce)

封装/外壳：8-VFSOP（0.091"，2.30mm 宽） 包装：卷带（TR） 描述：IC INVERTER 3CH 3-INP 8VSSOP 集成电路（IC） 门和反相器

Triple Inverter Gate

文件：839.74 Kbytes Page：16 Pages

Triple inverter

1. General description The 74LVC3G04 is a triple inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise

TRIPLE INVERTER GATE

Features  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.3V  CMOS Low Power Consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs Accept up to 5.5V  ESD Protection Tested per JESD 22 Exceeds 2,000V Human Body Model (A114) Exceeds 1,000V Charged D

Triple inverter

General description The 74LVC3G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and

Triple inverter

Triple inverter