位置:SN74LVC3G04DCURG4.B > SN74LVC3G04DCURG4.B详情

SN74LVC3G04DCURG4.B中文资料

厂家型号

SN74LVC3G04DCURG4.B

文件大小

643.11Kbytes

页面数量

20

功能描述

Triple Inverter Gate

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74LVC3G04DCURG4.B数据手册规格书PDF详情

1FEATURES

2• Available in the Texas Instruments NanoFree™

Package

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Max tpd of 4.1 ns at 3.3 V

• Low Power Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25°C

• Typical VOHV (Output VOH Undershoot)

>2 V at VCC = 3.3 V, TA = 25°C

• Ioff Supports Live Insertion, Partial-Power-

Down Mode, and Back-Drive Protection

• Can Be Used as a Down Translator to

Translate Inputs From a Max of 5.5 V Down to

the VCC Level

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

DESCRIPTION

This triple inverter is designed for 1.65-V to 5.5-V VCC

operation. The SN74LVC3G04 device performs the

Boolean function Y = A.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die

as the package.

This device is fully specified for partial-power-down

applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow

through the device when it is powered down.

更新时间:2026-2-17 13:30:00
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