SN74LVC1G80 Single Positive-Edge-Triggered D-Type Flip-Flop

1 Features 1• Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Supports Down Translation to VCC • Maximum tpd of 4.2 ns at 3.3 V • Low Power Consumption, 10-μA Maximum ICC • ±24-mA Output Drive at 3.3 V • Ioff Supports L

Single D-type flip-flop; positive-edge trigger

DESCRIPTION The 74LVC1G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. F

Single D-type flip-flop; positive-edge trigger

Single D-type flip-flop; positive-edge trigger

1. General description The 74LVC1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Inputs can be drive

Single D-type flip-flop; positive-edge trigger

Single D-type flip-flop; positive-edge trigger