8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：492.05 Kbytes Page：20 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：492.05 Kbytes Page：20 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：755.02 Kbytes Page：22 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：492.05 Kbytes Page：20 Pages

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：755.02 Kbytes Page：22 Pages

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 功能：串行至并行，串行 包装：卷带（TR） 描述：IC 8BIT SHIFT REG 3ST-OUT 16SSOP 集成电路（IC） 移位寄存器

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 功能：串行至并行，串行 包装：管件 描述：IC SHIFT REGISTER SGL 8B 16SSOP 集成电路（IC） 移位寄存器

8-bit serial-in/serial-out or parallel-out shift register; 3-state

1. General description The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asyn

8-bit serial-in/serial or parallel-out shift register with output latches 3-State

DESCRIPTION The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595. FEATURES • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce)

8-bit serial-in/serial or parallel-out shift register with output latches 3-State

DESCRIPTION The 74LV595 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT595. FEATURES • Optimized for Low Voltage applications: 1.0V to 3.6V • Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V • Typical VOLP (output ground bounce)

8-bit serial-in/serial-out or parallel-out shift register; 3-state

1. General description The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asyn

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

文件：755.02 Kbytes Page：22 Pages