LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16SOP 集成电路（IC） 触发器

DUAL JK FLIP-FLOP WITH SET AND CLEAR

IC FF JK TYPE DUAL 1BIT 16SOP

IC FF JK TYPE DUAL 1BIT 16SOP

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16SOP 集成电路（IC） 触发器

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

DUAL JK FLIP-FLOP WITH SET AND CLEAR

The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long a

LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

DUAL JK FLIP-FLOP WITH SET AND CLEAR

The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long a

DUAL JK FLIP-FLOP WITH SET AND CLEAR

The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long a