LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages Dependable Texas Instruments Quality and Reliability description The ‘76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The ‘76 is a positive-edge-triggered flip- flo

Dual JK Flip-Flop with Set and Clear

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

DUAL JK FLIP-FLOP WITH SET AND CLEAR

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16SOP 集成电路（IC） 触发器

IC FF JK TYPE DUAL 1BIT 16SOP

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

Dual JK Flip-Flop with Set and Clear

文件：54.44 Kbytes Page：4 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16DIP 集成电路（IC） 触发器

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：531.82 Kbytes Page：13 Pages

DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR

文件：477.1 Kbytes Page：14 Pages

LOW POWER SCHOTTKY

Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform acc

Dual J-K Flip-Flop(with Preset and Clear)

Dual J-K Flip-Flop(with Preset and Clear)

DUAL JK FLIP - FLOP

[Signetics]

DUAL JK FLIP-FLOP WITH SET AND CLEAR

The SN54/74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long a

DUAL J-K NEGATIVE EDGE-TRIGGERED FLIP FLOP WITH SET AND RESET

FEATURES ® Negative edge-triggering ® Each fli-flop can be used independently ® Direct set and reset inputs ® Qand Q outputs ® Wide operating temperature range (T, = —20~+75°C)

Dual J-K Flip-Flop(with Preset and Clear)

DUAL JK FLIP - FLOP

LOW POWER SCHOTTKY

Dual J-K Flip-Flop(with Preset and Clear)

DUAL JK FLIP - FLOP

DUAL JK FLIP - FLOP

Transistor transistor logic

INTEGRATED CIRCUIT PINOUTS