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SN74LS74价格
参考价格：￥1.4917
型号：SN74LS74AD 品牌：TI 备注：这里有SN74LS74多少钱，2025年最近7天走势，今日出价，今日竞价，SN74LS74批发/采购报价，SN74LS74行情走势销售排行榜，SN74LS74报价。| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74LS74 | DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred | Motorola 摩托罗拉 |   | |
SN74LS74 | LOW POWER SCHOTTKY The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of | ONSEMI 安森美半导体 | | |
SN74LS74 | DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | |
SN74LS74 | DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | |
10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order dataline is encoded.Both devices have data inputs and outputs which are active at the low lo | Motorola 摩托罗拉 | | ||
10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54/74LS147 and the SN54/74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order dataline is encoded.Both devices have data inputs and outputs which are active at the low lo | Motorola 摩托罗拉 | | ||
LOW POWER SCHOTTKY The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of | ONSEMI 安森美半导体 | | ||
LOW POWER SCHOTTKY The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of | ONSEMI 安森美半导体 | | ||
LOW POWER SCHOTTKY The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of | ONSEMI 安森美半导体 | | ||
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred | Motorola 摩托罗拉 | | ||
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred | Motorola 摩托罗拉 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
Dual D-Type Positive Edge - Triggered Flip-Flop 文件：240.62 Kbytes Page：6 Pages | SYC | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
封装/外壳：14-SSOP（0.209"，5.30mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14SSOP 集成电路（IC） 触发器 | TI2 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14SOIC 集成电路（IC） 触发器 | TI2 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
Dual D-Type Positive Edge - Triggered Flip-Flop 文件：240.62 Kbytes Page：6 Pages | SYC | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：699.19 Kbytes Page：18 Pages | TI 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26034 Mbytes Page：23 Pages | TI1 德州仪器 | | ||
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR 文件：1.26312 Mbytes Page：21 Pages | TI 德州仪器 | | ||
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly relate | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | | ||
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred | Motorola 摩托罗拉 | |
| 替换型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | NSC | | |
LOW POWER SCHOTTKY | ONSEMI 安森美半导体 | ONSEMI | | |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | | |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP | Motorola 摩托罗拉 | Motorola | | |
54LS74A | ETCList of Unclassifed Manufacturers 未分类制造商 | ETC | | |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | | |
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | NSC | | |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Ouadruple 2-input Positive NAND Gates | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear) | RENESAS 瑞萨 | RENESAS | | |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear) | RENESAS 瑞萨 | RENESAS | | |
Surface Mount Power Inductors | ICE | ICE | | |
Surface Mount Power Inductors | ICE | ICE | | |
Transistor transistor logic | NTE | NTE | | |
INTEGRATED CIRCUIT PINOUTS | ETCList of Unclassifed Manufacturers 未分类制造商 | ETC | |
SN74LS74产品属性
- 类型
描述
- 型号
SN74LS74
- 功能描述
触发器 Dual Pos Edge Trig
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
24+ |
DIP-14 |
8000 |
只做原装正品现货 |
|||
onsemi(安森美) |
24+ |
1612 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
||||
TI(德州仪器) |
24+ |
标准封装 |
9398 |
原厂直销,大量现货库存,交期快。价格优,支持账期 |
|||
TI |
23+ |
SOP14 |
20000 |
全新原装假一赔十 |
|||
TI |
00+ |
SOP14 |
2600 |
全新原装进口自己库存优势 |
|||
TI/德州仪器 |
25+ |
DIP |
32000 |
TI/德州仪器全新特价SN74LS74AN即刻询购立享优惠#长期有货 |
|||
TI |
24+/25+ |
446 |
原装正品现货库存价优 |
||||
TI/德州仪器 |
24+ |
SOP14 |
1500 |
只供应原装正品 欢迎询价 |
|||
TI |
25+ |
SOIC14 |
4500 |
全新原装、诚信经营、公司现货销售! |
|||
TI/德州仪器 |
24+ |
SOIC-14_150mil |
4987 |
强势库存!绝对原装公司现货! |
SN74LS74规格书下载地址
SN74LS74参数引脚图相关
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- SN74S38
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- SN74S02
- SN74S00
- SN74S
- SN74LVT
- SN74LVC
- SN74LV
- SN74LS75NS
- SN74LS75NDS
- SN74LS75ND
- SN74LS75N
- SN74LS75JS
- SN74LS75JDS
- SN74LS75JD
- SN74LS75J
- SN74LS75
- SN74LS74N
- SN74LS74AW
- SN74LS74ANS
- SN74LS74ANDS
- SN74LS74AND
- SN74LS74AN
- SN74LS74AJS
- SN74LS74AJDS
- SN74LS74AJD
- SN74LS74AJ
- SN74LS74A
- SN74LS73N
- SN74LS73J
- SN74LS73AW
- SN74LS73ANS
- SN74LS73ANDS
- SN74LS73AND
- SN74LS73AN
- SN74LS73AJS
- SN74LS73AJDS
- SN74LS73AJD
- SN74LS73AJ
- SN74LS73A
- SN74LS670NS
- SN74LS670NDS
- SN74LS670ND
- SN74LS670N
- SN74LS670JS
- SN74LS670JDS
- SN74LS670JD
- SN74LS670J
- SN74LS
- SN74L71
- SN74L44
- SN74L43
- SN74L42
- SN74HC
- SN74H87
- SN74H78
- SN74H74
- SN74H62
- SN74H61
- SN74H60
- SN74H00
- SN74F86
- SN74F74
- SN74F51
- SN74F38
- SN74F37
- SN74F36
- SN74F32
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