SNx4HCT74 Dual D-Type Positive-Edge-Triggered Flip-Flips With Clear and Preset

1 Features • Operating voltage range of 4.5 V to 5.5 V • Outputs can drive up to 10 LSTTL loads • Low power consumption, 40-μA max ICC • Typical tpd = 17 ns • ±4-mA output drive at 5 V • Low input current of 1 μA max • Inputs are TTL-voltage compatible 2 Description The ’HCT74 devices c

Dual D-type flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICC category: flip-flops

Dual D-type flip-flop with set and reset; positive edge-trigger

1. General description The 74HC74 and 74HCT74 are dual positive edge triggered D-type flip-flop. They have individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive edge-trigger

Dual D-type flip-flop with set and reset; positive edge-trigger

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